Georgios Panagopoulos

According to our database1, Georgios Panagopoulos authored at least 14 papers between 2010 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Learning Influence Representations : Methods and Applciations. (Apprentissage des représentations d'influence : méthodes et applications).
PhD thesis, 2022

2018
A 40nW, Sub-IV Truly 'Digital' Reverse Bandgap Reference Using Bulk-Diodes in 16nm FinFET.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2014
Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology.
Microelectron. J., 2014

2013
Challenges of RF and mixed signal design under process variability.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012
Proposal For Neuromorphic Hardware Using Spin Devices
CoRR, 2012

Ultra low energy analog image processing using spin based neurons.
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Write-optimized reliable design of STT MRAM.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Spin based neuron-synapse module for ultra low power programmable computational networks.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Cognitive computing with spin-based neural networks.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Low-power functionality enhanced computation architecture using spin-based devices.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Multi-level wordline driver for low power SRAMs in nano-scale CMOS technology.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2010
HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

Parametric failure analysis of embedded SRAMs using fast & accurate dynamic analysis.
Proceedings of the 15th European Test Symposium, 2010


  Loading...