Georges Sagnes

According to our database, Georges Sagnes authored at least 5 papers between 1988 and 1994.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1994

Component Selection, Scheduling and Control Schemes for High Level Synthesis.

Bruno Rouzeyre, D. Dupont, Georges Sagnes

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1991

Optimization of micro-controllers by partitioning.

Gerard Tarroux, Bruno Rouzeyre, Georges Sagnes

Proceedings of the conference on European design automation, 1991

High level synthesis: a data path partitioning method dedicated to speed enhancement.

F. Monteiro, Bruno Rouzeyre, Georges Sagnes

Proceedings of the conference on European design automation, 1991

1989

Operators allocation in the silicon compiler SCOOP.

Bruno Rouzeyre, Toufic Ezzedine, Georges Sagnes

Integr., 1989

1988

A 16-bit specialized processor design.

Toufic Ezzedine, Veronique Tempier, Georges Sagnes

Integr., 1988