George Michelogiannakis
Orcid: 0000-0003-3743-6054
According to our database1,
George Michelogiannakis
authored at least 55 papers
between 2007 and 2024.
Collaborative distances:
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Bibliography
2024
ACM J. Emerg. Technol. Comput. Syst., April, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
Job Scheduling in High Performance Computing Systems with Disaggregated Memory Resources.
Proceedings of the IEEE International Conference on Cluster Computing, 2024
2023
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023
CoRR, 2023
Proceedings of the High Performance Computing - 38th International Conference, 2023
Proceedings of the International Symposium on Memory Systems, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Efficient Intra-Rack Resource Disaggregation for HPC Using Co-Packaged DWDM Photonics.
Proceedings of the IEEE International Conference on Cluster Computing, 2023
2022
ACM Trans. Archit. Code Optim., 2022
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022
Superconducting Digital DIT Butterfly Unit for Fast Fourier Transform Using Race Logic.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Temporal and SFQ pulse-streams encoding for area-efficient superconducting accelerators.
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022
2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
2020
PINE: Photonic Integrated Networked Energy efficient datacenters (ENLITENED Program) [Invited].
JOCN, 2020
ACM J. Emerg. Technol. Comput. Syst., 2020
TIGER: Topology-aware Assignment using Ising machines Application to Classical Algorithm Tasks and Quantum Circuit Gates.
CoRR, 2020
Proceedings of the International Conference for High Performance Computing, 2020
Understanding Quantum Control Processor Capabilities and Limitations through Circuit Characterization.
Proceedings of the International Conference on Rebooting Computing, 2020
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020
2019
Proceedings of the International Conference for High Performance Computing, 2019
Proceedings of the International Symposium on Memory Systems, 2019
PARADISE - Post-Moore Architecture and Accelerator Design Space Exploration Using Device Level Simulation and Experiments.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
2018
The Pitfalls of Provisioning Exascale Networks: A Trace Replay Analysis for Understanding Communication Performance.
Proceedings of the High Performance Computing - 33rd International Conference, 2018
Architectural Opportunities and Challenges from Emerging Photonics in Future Systems.
Proceedings of the Photonics in Switching and Computing, 2018
2017
Towards an Integrated Strategy to Preserve Digital Computing Performance Scaling Using Emerging Technologies.
Proceedings of the High Performance Computing, 2017
CASPER - Configurable design space exploration of programmable architectures for machine learning using beyond moore devices.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017
Proceedings of the 24th IEEE International Conference on High Performance Computing, 2017
APHiD: Hierarchical Task Placement to Enable a Tapered Fat Tree Topology for Lower Power and Cost in HPC Networks.
Proceedings of the 17th IEEE/ACM International Symposium on Cluster, 2017
2016
Proceedings of the High Performance Computing - 31st International Conference, 2016
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016
2015
Int. J. Parallel Program., 2015
2014
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
OpenSoC Fabric: On-Chip Network Generator: Using Chisel to Generate a Parameterizable On-Chip Interconnect Fabric.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014
Proceedings of the 2014 International Conference on Supercomputing, 2014
2013
Proceedings of the International Conference for High Performance Computing, 2013
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012
2011
IEEE Comput. Archit. Lett., 2011
2010
An analysis of on-chip interconnection networks for large-scale chip multiprocessors.
ACM Trans. Archit. Code Optim., 2010
Proceedings of the NOCS 2010, 2010
2009
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
2007
Proceedings of the First International Symposium on Networks-on-Chips, 2007