George M. Belansek

According to our database, George M. Belansek authored at least 3 papers between 1991 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offering.

John E. Barth Jr., Jeffrey H. Dreibelbis, Eric A. Nelson, Darren Anand, Gary Pomichter, Peter Jakobsen, Michael R. Nelms, Jeffrey Leach, George M. Belansek

IBM J. Res. Dev., 2002

2001

Embedded DRAM built in self test and methodology for test insertion.

Peter Jakobsen, Jeffrey H. Dreibelbis, Gary Pomichter, Darren Anand, John Barth, Michael R. Nelms, Jeffrey Leach, George M. Belansek

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

1991

A multilayered ceramic (MLC) interface design for 125+MHz performance wafer probing [of SRAMs].

George M. Belansek, Peter Loomis, Fred J. Towler, Charles Warner, Donald Wheeler

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991