George K. Papakonstantinou
According to our database1,
George K. Papakonstantinou
authored at least 123 papers
between 1971 and 2022.
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Bibliography
2022
Int. J. Circuit Theory Appl., 2022
2020
J. Circuits Syst. Comput., 2020
2018
A Nonlinear Integer Programming Approach for the Minimization of Boolean Expressions.
J. Circuits Syst. Comput., 2018
2017
2016
Int. J. Pattern Recognit. Artif. Intell., 2016
Proceedings of the 24th Euromicro International Conference on Parallel, 2016
2014
J. Circuits Syst. Comput., 2014
2013
Proceedings of the Ambient Media and Systems - Third International ICST Conference, 2013
2012
J. Multiple Valued Log. Soft Comput., 2012
Towards the optimal synchronization granularity for dynamic scheduling of pipelined computations on heterogeneous computing systems.
Concurr. Comput. Pract. Exp., 2012
2011
Distributed dynamic load balancing for pipelined computations on heterogeneous systems.
Parallel Comput., 2011
2010
Studying the impact of synchronization frequency on scheduling tasks with dependencies in heterogeneous systems.
Perform. Evaluation, 2010
J. Circuits Syst. Comput., 2010
Comput. Lang. Syst. Struct., 2010
2009
Proceedings of the Twentienth IEEE/IFIP International Symposium on Rapid System Prototyping, 2009
Proceedings of the Artificial Intelligence Applications and Innovations III, 2009
2008
Cronus: A platform for parallel code generation based on computational geometry methods.
J. Syst. Softw., 2008
J. Parallel Distributed Comput., 2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7.
Proceedings of the 2008 International Conference on Computer Design, 2008
A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions for Multi-Output Incompletely Specified Boolean Functions.
Proceedings of the 2008 International Conference on Computer Design, 2008
2007
A Flexible General-Purpose Parallelizing Architecture for Nested Loops in Reconfigurable Platforms.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the Artificial Intelligence and Innovations 2007: from Theory to Applications, 2007
Optimal synchronization frequency for dynamic pipelined computations on heterogeneous systems.
Proceedings of the 2007 IEEE International Conference on Cluster Computing, 2007
2006
Proceedings of the Advances in Artificial Intelligence, 4th Helenic Conference on AI, 2006
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006
A heuristic algorithm to minimize ESOPs for multiple-output incompletely specified functions.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the 2006 IEEE International Conference on Cluster Computing, 2006
2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
Proceedings of the Fourth IEEE International Symposium on Network Computing and Applications (NCA 2005), 2005
2004
J. Circuits Syst. Comput., 2004
Proceedings of the Methods and Applications of Artificial Intelligence, 2004
Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2003
Scheduling Nested Loops with the Least Number of Processors.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003
2002
Handling advanced scheduling heuristics under a hardware compiler generation environment.
Knowl. Based Syst., 2002
Analyzing the 24-hour blood pressure and heart-rate variability with self-organizing feature maps.
Int. J. Intell. Syst., 2002
Proceedings of the 10th Euromicro Workshop on Parallel, 2002
2001
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 2001
Proceedings of the Eigth International Conference on Parallel and Distributed Systems, 2001
Proceedings of the High-Performance Computing and Networking, 9th International Conference, 2001
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
Chain Grouping: A Method for Partitioning Loops onto Mesh-Connected Processor Arrays.
IEEE Trans. Parallel Distributed Syst., 2000
A Decentralized Multichannel Length Transformation Algorithm and Its Parallel Implementation for Real-Time ECG Monitoring.
Comput. Biomed. Res., 2000
An efficient algorithm for the physical mapping of clustered task graphs onto multiprocessor architectures.
Proceedings of the Eight Euromicro Workshop on Parallel and Distributed Processing, 2000
Proceedings of the Sixth Internatonal Workshop on Parsing Technologies, 2000
Proceedings of the 2000 International Conference on Parallel Processing, 2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
A complete specification and implementation methodology for high-level hardware transformations.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
1999
Mixture Density Estimation Based on Maximum Likelihood and Sequential Test Statistics.
Neural Process. Lett., 1999
J. Parallel Distributed Comput., 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Proceedings of the Correct Hardware Design and Verification Methods, 1999
1998
A Chart-like Parser for Context Sensitive Grammars.
Proceedings of the 1st Workshop on Tabulation in Parsing and Deduction, 1998
Proceedings of the 1998 ACM symposium on Applied Computing, 1998
Proceedings of the Proceedings 1998 IEEE/RSJ International Conference on Intelligent Robots and Systems. Innovations in Theory, 1998
Proceedings of the International Conference on Parallel and Distributed Systems, 1998
A vector quantization schema for non-stationary signal distributions based on ML estimation of mixture densities.
Proceedings of the 9th European Signal Processing Conference, 1998
Proceedings of the 9th European Signal Processing Conference, 1998
Proceedings of the 9th European Signal Processing Conference, 1998
Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
AGENDA: An Attribute Grammar Driven Environment for the Design Automation of Digital Systems.
Proceedings of the 1998 Design, 1998
A unified model for multimedia retrieval by content.
Proceedings of the Computers and Their Applications (CATA-98), 1998
1997
The autonomous mobile robot SENARIO: a sensor aided intelligent navigation system for powered wheelchairs.
IEEE Robotics Autom. Mag., 1997
Lower Time and Processor Bounds for Efficient Mapping of Uniform Dependence Algorithms into Systolic Arrays.
Parallel Algorithms Appl., 1997
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 1997
Proceedings of the 2nd International Conference on Intelligent User Interfaces, 1997
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
Proceedings of the 9th International Conference on Tools with Artificial Intelligence, 1997
Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997
Proceedings of the International Conference on Multimedia Computing and Systems, 1997
Proceedings of the Artificial Neural Networks, 1997
Proceedings of the High-Performance Computing and Networking, 1997
Hardware compilation using attribute grammars.
Proceedings of the Advances in Hardware Design and Verification, 1997
1996
Proceedings of the Parallel Virtual Machine, 1996
Proceedings of the Parallel Virtual Machine, 1996
Proceedings of the Eigth International Conference on Tools with Artificial Intelligence, 1996
Proceedings of the 1996 IEEE International Conference on Robotics and Automation, 1996
Proceedings of the High-Performance Computing and Networking, 1996
Qualitative Autonomous Navigation for Wheelchair Robots.
Proceedings of the 12th European Conference on Artificial Intelligence, 1996
Proceedings of the Parallel Computation, 1996
Proceedings of the Thirteenth National Conference on Artificial Intelligence and Eighth Innovative Applications of Artificial Intelligence Conference, 1996
1995
IEEE Trans. Syst. Man Cybern., 1995
Inf. Softw. Technol., 1995
Int. J. Artif. Intell. Tools, 1995
Proceedings of the High-Performance Computing and Networking, 1995
1994
Proceedings of the Database and Expert Systems Applications, 5th International Conference, 1994
1993
1992
Systematic synthesis of parallel VLSI architectures from FP specifications and its application to scene matching.
Microprocess. Microprogramming, 1992
Inf. Softw. Technol., 1992
AGP: A Parallel Processor for Knowledge and Software Engineering.
Comput. J., 1992
An Extension of the Certainty Factor Model in First Order Predicate Calculus.
Comput. J., 1992
1991
A Prolog-based design environment for the high-level synthesis of application-specific architectures.
Microprocessing and Microprogramming, 1991
1989
1986
An Attribute Grammar Interpreter as a Knowledge Engineering Tool.
Angew. Inform., 1986
1983
A Sentence Generator Based on an Attribute Grammar.
Angew. Inform., 1983
1982
The Interpretation of Meta Grammars Describing Syntax-Directed Interpreters Using an Attribute Grammar Interpreter.
IEEE Trans. Software Eng., 1982
1981
IEEE Trans. Software Eng., 1981
1980
A Recursive Algorithm for the Optimal Conversion of Decision Tables.
Angew. Inform., 1980
1979
1978
1977
IEEE Trans. Computers, 1977
1976
1972
1971