George Gristede

According to our database, George Gristede authored at least 17 papers between 1990 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Efficient AI System Design With Cross-Layer Approximate Computing.

Swagath Venkataramani, Xiao Sun, Naigang Wang, Chia-Yu Chen, Jungwook Choi, Mingu Kang, Ankur Agarwal, Jinwook Oh, Shubham Jain, Tina Babinsky, Nianzheng Cao, Thomas W. Fox, Bruce M. Fleischer, George Gristede, Michael Guillorn, Howard Haynie, Hiroshi Inoue, Kazuaki Ishizaki, Michael J. Klaiber, Shih-Hsien Lo, Gary W. Maier, Silvia M. Mueller, Michael Scheuermann, Eri Ogawa, Marcel Schaal, Mauricio J. Serrano, Joel Silberman, Christos Vezyrtzis, Wei Wang, Fanchieh Yee, Jintao Zhang, Matthew M. Ziegler, Ching Zhou, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Vijayalakshmi Srinivasan, Leland Chang, Kailash Gopalakrishnan

Proc. IEEE, 2020

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference.

Jinwook Oh, Sae Kyu Lee, Mingu Kang, Matthew M. Ziegler, Joel Silberman, Ankur Agrawal, Swagath Venkataramani, Bruce M. Fleischer, Michael Guillorn, Jungwook Choi, Wei Wang, Silvia M. Mueller, Shimon Ben-Yehuda, James Bonanno, Nianzheng Cao, Robert Casatuta, Chia-Yu Chen, Matt Cohen, Ophir Erez, Thomas W. Fox, George Gristede, Howard Haynie, Vicktoria Ivanov, Siyu Koswatta, Shih-Hsien Lo, Martin Lutz, Gary W. Maier, Alex Mesh, Yevgeny Nustov, Scot Rider, Marcel Schaal, Michael Scheuermann, Xiao Sun, Naigang Wang, Fanchieh Yee, Ching Zhou, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2018

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.

Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Vijayalakshmi Srinivasan, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Across the Stack Opportunities for Deep Learning Acceleration.

Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

2016

A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis Programs.

Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni

Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, 2016

A synthesis-parameter tuning system for autonomous design-space exploration.

Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014

POWER8 design methodology innovations for improving productivity and reducing power.

Matthew M. Ziegler, Ruchir Puri, Bob Philhower, Robert L. Franch, Wing K. Luk, Jens Leenstra, Peter Verwegen, Niels Fricke, George Gristede, Eric Fluhr, Victor V. Zyuban

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

Power reduction by aggressive synthesis design space exploration.

Matthew M. Ziegler, George Gristede, Victor V. Zyuban

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2009

A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR).

Milena Vratonjic, Matthew M. Ziegler, George Gristede, Victor V. Zyuban, Thomas Mitchell, Ee Cho, Chandu Visweswariah, Vojin G. Oklobdzija

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

The opportunity cost of low power design: a case study in circuit tuning.

Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

2005

Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies.

Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky

Integr., 2005

2004

Characterization of logic circuit techniques for high leakage CMOS technologies.

Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

Low-power circuits and technology for wireless digital systems.

Stephen V. Kosonocky, Azeez J. Bhavnagarwala, Kenneth Chin, George Gristede, Anne-Marie Haen, Wei Hwang, Mark B. Ketchen, Suhwan Kim, Daniel R. Knebel, Kevin W. Warren, Victor V. Zyuban

IBM J. Res. Dev., 2003

2001

Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design.

W. Chen, Wei Hwang, Prabhakar Kudva, George Gristede, Stephen V. Kosonocky, Rajiv V. Joshi

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

2000

A scannable pulse-to-static conversion register array for self-timed circuits.

Wei Hwang, Rajiv V. Joshi, George Gristede

IEEE J. Solid State Circuits, 2000

A comparison of dual-rail pass transistor logic families in 1.5V, 0.18µm CMOS technology for low power applications.

George Gristede, Wei Hwang

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1990

Measuring Error Propagation in Waveform Relaxation Algorithms.

Charles A. Zukowski, George Gristede, Albert E. Ruehli

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990