George Floros

Orcid: 0000-0002-2867-9604

Affiliations:
  • University of Thessaly, Volos, Greece (PhD 2019)


According to our database1, George Floros authored at least 28 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
An Efficient Approach for Combined Electromigration and Thermomigration Analysis Based on the Extended Krylov Subspace.
Proceedings of the 20th International Conference on Synthesis, 2024

A Fast Security Closure Approach for EM-based Attacks on General Multi-Segment Interconnects.
Proceedings of the 20th International Conference on Synthesis, 2024

Efficient Parametric Model Order Reduction for Large-Scale Circuit Models using Extended Krylov Subspace.
Proceedings of the 20th International Conference on Synthesis, 2024

An Electromigration-Aware Wire Sizing Methodology via Particle Swarm Optimization.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
Fast electromigration stress analysis using Low-Rank Balanced Truncation for general interconnect and power grid structures.
Integr., March, 2023

Electromigration Stress Analysis with Rational Krylov-based Approximation of Matrix Exponential.
Proceedings of the 19th International Conference on Synthesis, 2023

PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power Grids.
Proceedings of the 19th International Conference on Synthesis, 2023

An Optimal Methodology for EM-Based Hardware Trojan Placement on Clock Tree Networks.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

On the Reduction of Large-Scale Room Acoustic Models.
Proceedings of the IEEE International Conference on Acoustics, 2023

A System Theoretic Approach for the Reduction of Large-Scale Room Acoustic Models.
Proceedings of the 31st European Signal Processing Conference, 2023

An Efficient Security Closure Methodology for EM-based Attacks on Power Grid Structures.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees Using Matrix Exponential.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Design Space Exploration of a Sparse MobileNetV2 Using High-Level Synthesis and Sparse Matrix Techniques on FPGAs.
Sensors, 2022

Exploiting Net Connectivity in Legalization and Detailed Placement Scenarios.
Inf., 2022

The Extended and Asymmetric Extended Krylov Subspace in Moment-Matching-Based Order Reduction of Large Circuit Models.
CoRR, 2022

Accelerating Electromigration Stress Analysis Using Low-Rank Balanced Truncation.
Proceedings of the 18th International Conference on Synthesis, 2022

Near Data Processing Performance Improvement Prediction via Metric-Based Workload Classification.
Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022

A Novel Semi-Analytical Approach for Fast Electromigration Stress Analysis in Multi-Segment Interconnects.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs.
IEEE Access, 2021

Redesign, Extensibility & Evaluation of a Placement Utilities Toolset.
Proceedings of the 6th South-East Europe Design Automation, 2021

Statistical Estimation of Leakage Power Bounds in CMOS VLSI Circuits.
Proceedings of the PCI 2021: 25th Pan-Hellenic Conference on Informatics, Volos, Greece, November 26, 2021

Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Frequency-Limited Reduction of Regular and Singular Circuit Models Via Extended Krylov Subspace Method.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Efficient IC hotspot thermal analysis via low-rank Model Order Reduction.
Integr., 2019

Efficient Circuit Reduction in Limited Frequency Windows.
Proceedings of the 16th International Conference on Synthesis, 2019

2018
Efficient Hotspot Thermal Simulation Via Low-Rank Model Order Reduction.
Proceedings of the 15th International Conference on Synthesis, 2018

A parallel iterative approach for efficient full chip thermal analysis.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

2014
Database and baseline system for detecting degraded traffic signs in urban environments.
Proceedings of the 5th European Workshop on Visual Information Processing, 2014


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