George English
According to our database1,
George English
authored at least 4 papers
between 2007 and 2015.
Collaborative distances:
Collaborative distances:
Timeline
2007
2008
2009
2010
2011
2012
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2014
2015
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2015
The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking.
IEEE J. Solid State Circuits, 2015
2014
5.2 Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8<sup>TM</sup> microprocessor.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
A Wide Power-Supply Range (0.5V-to-1.3V) Wide Tuning Range (500 MHz-to-8 GHz) All-Static CMOS AD PLL in 65nm SOI.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007