George A. Katopis

According to our database1, George A. Katopis authored at least 8 papers between 1985 and 2009.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2002, "For contributions to the advancement of switching noise estimation and containment in first level packaging structures and architecting of design approaches".

Timeline

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Links

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Bibliography

2009
Design methodology of high performance on-chip global interconnect using terminated transmission-line.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008
Low Power Passive Equalizer Design for Computer Memory Links.
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008

Low power passive equalizer optimization using tritonic step response.
Proceedings of the 45th Design Automation Conference, 2008

2002
First- and second-level packaging for the IBM eServer z900.
IBM J. Res. Dev., 2002

Macromodeling of Digital I/O Ports for System EMC Assessment .
Proceedings of the 2002 Design, 2002

1999
MCM technology and design for the S/390 G5 system.
IBM J. Res. Dev., 1999

1992
Physical and electrical design features of the IBM Enterprise System/9000 circuit module.
IBM J. Res. Dev., 1992

1985
Delta-I noise specification for a high-performance computing machine.
Proc. IEEE, 1985


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