Geontae Park

According to our database1, Geontae Park authored at least 2 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
A 0.15 to 2.2 GHz all-digital delay-locked loop.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

2012
A programmable delay-locked loop based clock multiplier.
Proceedings of the International SoC Design Conference, 2012


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