Geetani Edirisooriya
According to our database1,
Geetani Edirisooriya
authored at least 14 papers
between 1991 and 1996.
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Bibliography
1996
1995
J. Electron. Test., 1995
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993
On the Performance of Augmented Signature Testing.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Proceedings of the 22nd IEEE International Symposium on Multiple-Valued Logic, 1992
Proceedings of the Sixteenth Annual International Computer Software and Applications Conference, 1992
1991
Aliasing Probability in Multiple Input Linear Signature Automata for Q-ary Symmetric Errors.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991