Geeng-Lih Lin

According to our database, Geeng-Lih Lin authored at least 4 papers between 2008 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Study on the Guard Rings for Latchup Prevention between HV-PMOS and LV-PMOS in a 0.15-µm BCD Process.

Chao-Yang Chen, Jian-Hsing Lee, Karuna Nidhi, Tzer-Yaa Bin, Geeng-Lih Lin, Ming-Dou Ker

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2015

Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection.

Seian-Feng Liao, Kai-Neng Tang, Ming-Dou Ker, Jia-Rong Yeh, Hwa-Chyi Chiou, Yeh-Jen Huang, Chun-Chien Tsai, Yeh-Ning Jou, Geeng-Lih Lin

Proceedings of the European Conference on Circuit Theory and Design, 2015

2009

Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection.

Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration.

Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang, Yeh-Ning Jou, Geeng-Lih Lin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008