Ge Yang

Affiliations:
  • Nvidia Corp., Santa Clara, CA, USA
  • University of California, Department of Electrical Engineering, Santa Cruz, Santa Cruz, CA, USA


According to our database1, Ge Yang authored at least 5 papers between 2004 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2005
A 32-bit carry lookahead adder using dual-path all-N logic.
IEEE Trans. Very Large Scale Integr. Syst., 2005

Current mode multi-level simultaneous bidirectional I/O scheme for chip-to-chip communications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Low Power and High Performance Circuit Techniques for High Fan-In Dynamic Gates.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


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