Gaurav Rajavendra Reddy
Orcid: 0000-0002-1259-4913
According to our database1,
Gaurav Rajavendra Reddy
authored at least 13 papers
between 2016 and 2024.
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Bibliography
2024
PatternPaint: Generating Layout Patterns Using Generative AI and Inpainting Techniques.
CoRR, 2024
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
2020
ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric.
Proceedings of the 38th IEEE VLSI Test Symposium, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Proceedings of the 20th International Workshop on Microprocessor/SoC Test, 2019
VIPER: A Versatile and Intuitive Pattern GenERator for Early Design Space Exploration.
Proceedings of the IEEE International Test Conference, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Enhanced hotspot detection through synthetic pattern generation and design of experiments.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
2017
A field programmable transistor array featuring single-cycle partial/full dynamic reconfiguration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Hardware-based attacks to compromise the cryptographic security of an election system.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016