Gaurav Kolhe

Orcid: 0000-0002-7807-6721

According to our database1, Gaurav Kolhe authored at least 24 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Microscaling Data Formats for Deep Learning.
CoRR, 2023

Shared Microexponents: A Little Shifting Goes a Long Way.
CoRR, 2023


2022
Re-imagining the Security of the Hardware using Lookup Table based Obfuscation
PhD thesis, 2022

Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation.
ACM Trans. Design Autom. Electr. Syst., 2022

A Neural Network-Based Cognitive Obfuscation Toward Enhanced Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Neural Network-based SAT-Resilient Obfuscation Towards Enhanced Logic Locking.
CoRR, 2022

RAFeL - Robust and Data-Aware Federated Learning-inspired Malware Detection in Internet-of-Things (IoT) Networks.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Silicon validation of LUT-based logic-locked IP cores.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Deep Graph Learning for Circuit Deobfuscation.
Frontiers Big Data, 2021

A Cognitive SAT to SAT-Hard Clause Translation-based Logic Obfuscation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

On-device Malware Detection using Performance-Aware and Robust Collaborative Learning.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
SATConda: SAT to SAT-Hard Clause Translator.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Phased-Guard: Multi-Phase Machine Learning Framework for Detection and Identification of Zero-Day Microarchitectural Side-Channel Attacks.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Estimating the Circuit De-obfuscation Runtime based on Graph Deep Learning.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Estimating the Circuit Deobfuscating Runtime based on Graph Deep Learning.
CoRR, 2019

System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation.
Proceedings of the 2019 IEEE Cybersecurity Development, 2019

Stealthy Malware Detection using RNN-Based Automated Localized Feature Extraction and Classifier.
Proceedings of the 31st IEEE International Conference on Tools with Artificial Intelligence, 2019

RNN-Based Classifier to Detect Stealthy Malware using Localized Features and Complex Symbolic Sequence.
Proceedings of the 18th IEEE International Conference On Machine Learning And Applications, 2019

Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality.
Proceedings of the International Conference on Computer-Aided Design, 2019

On Custom LUT-based Obfuscation.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

MicroArchitectural Events and Image Processing-based Hybrid Approach for Robust Malware Detection.
Proceedings of the 2019 International Conference on Compliers, 2019


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