Gangsik Lee

According to our database, Gangsik Lee authored at least 1 paper in 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO Circuitry.

Jaehyeok Yang, Hyeongjun Ko, Kyunghoon Kim, Hyunsu Park, Jihwan Park, Ji-Hyo Kang, Jin-Youp Cha, Seongjin Kim, Youngtaek Kim, Minsoo Park, Gangsik Lee, Keonho Lee, Sanghoon Lee, Gyunam Jeon, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Seonwoo Hwang, Boram Kim, Sang-Yeon Byeon, Sungkwon Lee, Hyeonyeol Park, Joohwan Cho, Jonghwan Kim

Proceedings of the IEEE International Solid-State Circuits Conference, 2024