Gadi Haber
According to our database1,
Gadi Haber
authored at least 22 papers
between 1996 and 2023.
Collaborative distances:
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Bibliography
2023
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
2018
Chaperone - Runtime System for Instrumenting Applications via Partial Binary Translation.
Proceedings of the 11th ACM International Systems and Storage Conference, 2018
2017
Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017
2015
IEEE Trans. Parallel Distributed Syst., 2015
Proceedings of the Symposium on High Performance Computing, 2015
2014
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
2012
Autom. Softw. Eng., 2012
Fast Evaluation of Boolean Circuits Based on Two-Players Game and Optical Connectivity Circuits.
Proceedings of the 41st International Conference on Parallel Processing, 2012
2010
Proceedings of of SYSTOR 2010: The 3rd Annual Haifa Experimental Systems Conference, 2010
HparC: a mixed nested shared memory and message passing programming style intended for grid.
Proceedings of of SYSTOR 2010: The 3rd Annual Haifa Experimental Systems Conference, 2010
2008
Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, 2008
Complementing Missing and Inaccurate Profiling Using a Minimum Cost Circulation Algorithm.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008
Proceedings of the High Performance Embedded Architectures and Compilers, 2008
2007
Proceedings of the Hardware and Software: Verification and Testing, 2007
2006
Int. J. Embed. Syst., 2006
2004
J. Parallel Distributed Comput., 2004
Proceedings of the EMSOFT 2004, 2004
2003
Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003
2001
IEEE Trans. Parallel Distributed Syst., 2001
1998
Proceedings of the Euro-Par '98 Parallel Processing, 1998
1997
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
1996
On the usage of simulators to detect inefficiency of parallel programs caused by "bad" schedulings: The Simparc approach.
J. Syst. Softw., 1996