Gabriele Montanaro

Orcid: 0000-0003-1119-2629

According to our database1, Gabriele Montanaro authored at least 6 papers between 2022 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
HLS-based acceleration of the BIKE post-quantum KEM on embedded-class heterogeneous SoCs.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

An Evaluation of the State-Of-The-Art Software and Hardware Implementations of BIKE.
Proceedings of the 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2023

2022
Efficient and Scalable FPGA Design of GF($2^m$2m) Inversion for Post-Quantum Cryptosystems.
IEEE Trans. Computers, 2022

Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

FPGA implementation of BIKE for quantum-resistant TLS.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

On the use of hardware accelerators in QC-MDPC code-based cryptography.
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022


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