Gabriel Molas
Orcid: 0000-0002-7345-4164
According to our database1,
Gabriel Molas
authored at least 23 papers
between 2012 and 2024.
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Bibliography
2024
IEEE J. Solid State Circuits, September, 2024
Experimental Demonstration of Non-Stateful In-Memory Logic With 1T1R OxRAM Valence Change Mechanism Memristors.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024
Proceedings of the IEEE International Memory Workshop, 2024
2023
Fully Binarized, Parallel, RRAM-Based Computing Primitive for In-Memory Similarity Search.
IEEE Trans. Circuits Syst. II Express Briefs, 2023
1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro.
Proceedings of the IEEE International Memory Workshop, 2023
2022
CoRR, 2022
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Memory Workshop, 2022
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.
Proceedings of the IEEE International Memory Workshop, 2022
2021
Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Proceedings of the IEEE International Memory Workshop, 2021
16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors.
Proceedings of the IEEE International Memory Workshop, 2021
Proceedings of the IEEE International Memory Workshop, 2021
2020
Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations.
IEEE Access, 2020
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
2018
Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2018
2013
Back-end 3D integration of HfO2-based RRAMs for low-voltage advanced IC digital design.
Proceedings of 2013 International Conference on IC Design & Technology, 2013
On the forming-free operation of HfOx based RRAM devices: Experiments and ab initio calculations.
Proceedings of the European Solid-State Device Research Conference, 2013
A novel HfO2-GeS2-Ag based conductive bridge RAM for reconfigurable logic applications.
Proceedings of the European Solid-State Device Research Conference, 2013
2012
On the impact of Ag doping on performance and reliability of GeS2-based Conductive Bridge Memories.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012