Gabor C. Temes

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

Reciprocity and Inter-Reciprocity: A Tutorial - Part I: Linear Time-Invariant Networks.

[BibT_eX]

[DOI]

Shanthi Pavan

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

A Low-Distortion Power-Efficient Feedforward Technique for DT Delta-Sigma ADCs.

[BibT_eX]

[DOI]

Hanyu Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Mismatch Shaping for Binary-Coded DAC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator.

[BibT_eX]

[DOI]

Hanyu Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Switched-Capacitor Circuits.

[BibT_eX]

[DOI]

David J. Allstot

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Low-Distortion Correlated Level Shifting Sample-and-Hold Stage.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion.

[BibT_eX]

[DOI]

Emanuel Caceres

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW.

[BibT_eX]

[DOI]

Praveen Kumar Venkatachala

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020

A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique.

[BibT_eX]

[DOI]

Yang Xu

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Incremental Delta-Sigma ADCs: A Tutorial Review.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst., 2020

Efficient Calibration of Feedback DAC in Delta Sigma Modulators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2020

Slewing Mitigation Technique for Switched Capacitor Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst., 2020

Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR.

[BibT_eX]

[DOI]

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Pseudo-Pseudo-Differential Multibit Delta-Sigma Modulator.

[BibT_eX]

[DOI]

Emanuel Caceres

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019

A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits.

[BibT_eX]

[DOI]

Tao He

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Thoughts on Engineering Creativity [Point of View].

[BibT_eX]

[DOI]

Proc. IEEE, 2019

Passive slew rate enhancement technique for Switched-Capacitor Circuits.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Predictive Noise Shaping SAR ADC.

[BibT_eX]

[DOI]

Ajmal K. Vadakkan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

An Amplifier-Free 0-2 SAR-VCO MASH ΔΣ ADC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

An 11-Bit 250-nW 10-kS/s SAR ADC With Doubled Input Range for Biomedical Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 0.49-13.3 MHz Tunable Fourth-Order LPF with Complex Poles Achieving 28.7 dBm OIP3.

[BibT_eX]

[DOI]

Pedram Payandehnia

Hamidreza Maghami

Hossein Mirzaie

Siladitya Dey

Massoud Tohidian

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

The Twin Arts of Writing and Revising Technical Articles.

[BibT_eX]

[DOI]

Laszlo Solymar

Proc. IEEE, 2018

Robust Continuous-Time MASH Delta Sigma Modulator.

[BibT_eX]

[DOI]

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A 13b-ENOB Noise Shaping SAR ADC with a Two-Capacitor DAC.

[BibT_eX]

[DOI]

Lukang Shi

Yi Zhang

Yanchao Wang

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Single-Loop Delta-Sigma ADC Using Noise-Coupled VCO Quantizer.

[BibT_eX]

[DOI]

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

System-level noise filtering and linearization.

[BibT_eX]

[DOI]

Tao He

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

Passive 3rd order delta-sigma ADC with VCO-based quantizer.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Pseudo-pseudo-differential circuits.

[BibT_eX]

[DOI]

Tao He

Yi Zhang

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Incremental ADC with parallel counting.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Power-on digital calibration method for delta-Sigma ADCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

History, present state-of-art and future of incremental ADCs.

[BibT_eX]

[DOI]

Chia-Hung Chen

Yi Zhang

Proceedings of the ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 2016

2015

A Continuous-Time Delta-Sigma Modulator for Biomedical Ultrasound Beamformer Using Digital ELD Compensation and FIR Feedback.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

In Defense of Engineering Education [Point of View].

[BibT_eX]

[DOI]

Laszlo Solymar

Proc. IEEE, 2015

A Micro-Power Two-Step Incremental Analog-to-Digital Converter.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Two-stage ΔΣ ADC with noise-coupled VCO-based quantizer.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A passive CMOS low-pass filter for high speed and high SNDR applications.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC Conference 2015, 2015

A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

Multi-step counting ADC.

[BibT_eX]

[DOI]

Pedram Payandehnia

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Low-power duty-cycle tuned filters.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Bootstrapping techniques for floating switches in switched-capacitor circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Double-sampled wideband delta-sigma ADCs with shifted loop delays.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A noise-coupled low-distortion delta-sigma ADC with shifted loop delays.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs.

[BibT_eX]

[DOI]

Tao Wang

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A fully-differential input amplifier with band-pass filter for biosensors.

[BibT_eX]

[DOI]

Wei Li

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 0.45mW 12b 12.5MS/s SAR ADC with digital calibration.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013

The Old Professor in Action.

[BibT_eX]

[DOI]

Laszlo Solymar

Proc. IEEE, 2013

2012

A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Calibration technique for SAR analog-to-digital converters.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Digital foreground calibration methods for SAR ADCs.

[BibT_eX]

[DOI]

Wei Li

Tao Wang

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Multi-channel mixed-signal noise source with applications to stochastic equalization.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay.

[BibT_eX]

[DOI]

Pavan Kumar Hanumolu

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

Micropower Data Converters: A Tutorial.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Correction to "An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and - 98 dB THD" [Aug 09 2202-2211].

[BibT_eX]

[DOI]

Matthew R. Miller

IEEE J. Solid State Circuits, 2010

An Enhanced Dual-Path DeltaSigma A/D Converter.

[BibT_eX]

[DOI]

Yoshio Nishida

Koichi Hamashita

IEICE Trans. Electron., 2010

A new zero-optimization scheme for noise-coupled ΔΣ ADCs.

[BibT_eX]

[DOI]

Ramin Zanbaghi

Terri S. Fiez

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Two-step junction-splitting SAR analog-to-digital converter.

[BibT_eX]

[DOI]

Jiaming Lin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Switched-resistor tuning technique for highly linear Gm-C filter design.

[BibT_eX]

[DOI]

Tao Wang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Design techniques for discrete-time delta-sigma ADCs with extra loop delay.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Noise-coupled low-power incremental ADCs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Energy-efficient time-interleaved and pipelined SAR ADCs.

[BibT_eX]

[DOI]

Jiaming Lin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Radix-based digital correction technique for two-capacitor DACs.

[BibT_eX]

[DOI]

Jinzhou Cao

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction.

[BibT_eX]

[DOI]

Mehmet Aslan

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and -98 dB THD.

[BibT_eX]

[DOI]

Matthew R. Miller

IEEE J. Solid State Circuits, 2009

A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

Low-distortion double-sampling ΔΣ ADC using a direct-charge-transfer adder.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A Digital Calibration Technique for DAC Mismatches in Delta-sigma Modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

An Enhanced Dual-path DeltaSigma Analog-to-digital Converter.

[BibT_eX]

[DOI]

Yoshio Nishida

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Improved Low-distortion DeltaSigma ADC Topology.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Noise-Power Optimization of Incremental Data Converters.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Efficient fully-floating double-sampling integrator for DeltaSigma ADCs.

[BibT_eX]

[DOI]

Jeongseok Chae

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 2.5MHz BW and 78dB SNDR delta-sigma modulator using dynamically biased amplifiers.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

New architectures for low-power delta-sigma analog-to-digital converter.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

Switched-Capacitor Track-and-Hold Amplifiers With Low Sensitivity to Op-Amp Imperfections.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Design of Low-Voltage Highly Linear Switched-R-MOSFET-C Filters.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

A Segmented Data-Weighted-Averaging Technique.

[BibT_eX]

[DOI]

Zhenyong Zhang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Mixed-Order Sturdy MASH Delta-Sigma Modulator.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Noise-Coupled Multi-Cell Delta-Sigma ADCs.

[BibT_eX]

[DOI]

Franco Maloberti

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 18 mW CT ΔΣ modulator with 25 MHz bandwidth for next generation wireless applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

A low-power 22-bit incremental ADC.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

Switched-capacitor track-and-hold amplifier with low sensitivity to op-amp imperfections.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Enhanced split-architecture delta-sigma ADC.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Incremental Delta-Sigma Structures for DC Measurement: an Overview.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

A 0.6V Highly Linear Switched-R-MOSFET-C Filter.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Design-oriented estimation of thermal noise in switched-capacitor circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Noise-shaping techniques applied to switched-capacitor voltage regulators.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

A generic multilevel multiplying D/A converter for pipelined ADCs.

[BibT_eX]

[DOI]

Vivek Sharma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 10-bit algorithmic A/D converter for cytosensor application.

[BibT_eX]

[DOI]

Thirumalai Rengachari

Vivek Sharma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset.

[BibT_eX]

[DOI]

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

In Memoriam.

[BibT_eX]

[DOI]

Alan N. Willson Jr.

Asad A. Abidi

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

An efficient ΔΣ ADC architecture for low oversampling ratios.

[BibT_eX]

[DOI]

János Márkus

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Theory and applications of incremental ΔΣ converters.

[BibT_eX]

[DOI]

János Márkus

José B. Silva

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Low-distortion delta-sigma topologies for MASH architectures.

[BibT_eX]

[DOI]

José B. Silva

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Experimental verification of a correlation-based correction algorithm for multi-bit delta-sigma ADCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002

A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation.

[BibT_eX]

[DOI]

Tetsuya Kajita

VLSI Design, 2002

A two-chip interface for a MEMS accelerometer.

[BibT_eX]

[DOI]

Tetsuya Kajita

IEEE Trans. Instrum. Meas., 2002

A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset op amps.

[BibT_eX]

[DOI]

Mustafa Keskin

IEEE J. Solid State Circuits, 2002

Digital correlation technique for the estimation and correction of DAC errors in multibit mash Delta-Sigma ADCs.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Digital techniques for improved ΔΣ data conversion.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

Area efficient CMOS charge pump circuits.

[BibT_eX]

[DOI]

Ryan Perigny

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Multibit Sigma-Delta ADC with mixed-mode DAC error correction.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator.

[BibT_eX]

[DOI]

Mustafa Keskin

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Efficient error-cancelling algorithmic ADC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A switched-capacitor DAC with analog mismatch correction.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Improved adaptive digital compensation for cascaded ΔΣ ADCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A highly linear low-power 10 bit DAC for GSM.

[BibT_eX]

[DOI]

Paul F. Ferguson Jr.

Xavier Haurie

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

MOSFET-only switched-capacitor circuits in digital CMOS technology.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1999

Digital techniques for improving the accuracy of data converters.

[BibT_eX]

[DOI]

Jesper Steensgaard

IEEE Commun. Mag., 1999

Capacitor mismatch error cancellation technique for a successive approximation A/D converter.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Mismatch-shaping serial digital-to-analog converter.

[BibT_eX]

[DOI]

Jesper Steensgaard

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Low-voltage switched-capacitor circuits.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998

High-accuracy circuits for on-chip capacitive ratio testing and sensor readout.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 1998

Offset- and gain-compensated track-and-hold stages.

[BibT_eX]

[DOI]

Yunteng Huang

Paul F. Ferguson Jr.

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

The use of predictive correlated double sampling techniques in low-voltage delta-sigma modulators.

[BibT_eX]

[DOI]

Jorge A. Grilo

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Predictive correlated double sampling switched-capacitor integrators.

[BibT_eX]

[DOI]

Jorge A. Grilo

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Oversampling A/D and D/A converters.

[BibT_eX]

[DOI]

Proceedings of the 9th European Signal Processing Conference, 1998

1996

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization.

[BibT_eX]

[DOI]

Christian C. Enz

Proc. IEEE, 1996

1995

An enhanced slew rate source follower.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, February, 1995

High-Linearity Switched-Capacitor Circuits in Digital CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

CMOS Circuits for On-Chip Capacitance Ratio Testing or Sensor Readout.

[BibT_eX]

Yuming Cao

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

ASP 12: Forum - Analog Electronics - a European Speciality?

[BibT_eX]

Rudy J. van de Plassche

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Dual-Quantization Multi-Bit Sigma Delta Analog/Digital Converter.

[BibT_eX]

[DOI]

Armond Hairapetian

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Novel Input Differential Pair for Improved Linearity Buffer and S/H Amplifier Design.

[BibT_eX]

[DOI]

Khayrollah Hadidi

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

SC Circuits: The State of the Art Compared to SI Techniques.

[BibT_eX]

Philippe Deval

Vlado Valencic

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

High Speed Buffers for Op-amp Characterization.

[BibT_eX]

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Adaptive Digital Correction for Dual Quantization Sigma-Delta Modulators.

[BibT_eX]

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1989

A quasi-passive CMOS pipeline D/A converter.

[BibT_eX]

[DOI]

Fong-Jim Wang

Simon Law

IEEE J. Solid State Circuits, December, 1989

1978

Real-factor FFT algorithms.

[BibT_eX]

[DOI]

K. M. Cho

Proceedings of the IEEE International Conference on Acoustics, 1978

1974

Design Technique for Vestigial-Sideband Filters.

[BibT_eX]

[DOI]

Henry John Orchard

IEEE Trans. Commun., 1974

1972

Some applications of the adjoint network concept in frequency domain analysis and optimization.

[BibT_eX]

[DOI]

R. M. Ebers

R. N. Gadenz

Comput. Aided Des., 1972

1971

An efficient procedure for the statistical transient analysis of switching circuits.

[BibT_eX]

[DOI]

R. N. Gadenz

Comput. Aided Des., 1971

1969

Correspondence.

[BibT_eX]

[DOI]