Ga-Won Lee

Orcid: 0000-0001-5285-4815

Affiliations:
  • Chungnam National University, Department of Electronics Engineering, Daejeon, Korea


According to our database1, Ga-Won Lee authored at least 7 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Epitaxial Strain Control of HfxZr1-xO2 with Sub-nm IGZO Seed Layer Achieving EOT=0.44 nm for DRAM Cell Capacitor.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022
Bottom-Gated ZnO TFT Pressure Sensor with 1D Nanorods.
Sensors, 2022

2020
Investigation of Random Telegraph Noise Characteristics with Intentional Hot Carrier Aging.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Reliability Analysis by Charge Migration of 3D SONOS Flash Memory.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2012
Comparative Analysis of Bandgap-Engineered Pillar Type Flash Memory with HfO<sub>2</sub> and S<sub>3</sub>N<sub>4</sub> as Trapping Layer.
IEICE Trans. Electron., 2012

2011
Dual-Gate ZnO Thin-Film Transistors with SiNx as Dielectric Layer.
IEICE Trans. Electron., 2011

2010
SONOS-Type Flash Memory with HfO<sub>2</sub> Thinner than 4 nm as Trapping Layer Using Atomic Layer Deposition.
IEICE Trans. Electron., 2010


  Loading...