G. Jack Lipovski

According to our database1, G. Jack Lipovski authored at least 60 papers between 1969 and 1999.

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IEEE Fellow

IEEE Fellow 1994, "For contributions to the development of database machines.".

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Bibliography

1999
The Dynamic Associative Access Memory Chip and Its Application to SIMD Processing and Full-Text Database Retrieval.
Proceedings of the 7th IEEE International Workshop on Memory Technology, 1999

1998
Retrospective: Banyan Networks for Partitioning Multiprocessor Systems.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

1996
Efficient Processing of One and Two Dimensional Proximity Queries in Associative Memory.
Proceedings of the 19th Annual International ACM SIGIR Conference on Research and Development in Information Retrieval, 1996

1992
A four megabit Dynamic Systolic Associative Memory chip.
J. VLSI Signal Process., 1992

1990
Dynamic systolic associative memory chip.
Proceedings of the Application Specific Array Processors, 1990

1988
A Fetch-And-Op Implementation for Parallel Computers.
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

Regular CC-Banyan Networks.
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

SIMD and MIMD processing in the Texas Reconfigurable Array Computer.
Proceedings of the Twelfth International Computer Software and Applications Conference, 1988

1987
Parallel computing - theory and comparisons.
Wiley, ISBN: 978-0-471-82262-2, 1987

1985
B-Log: A Branch and Bound Methodology for the Parallel Execution of Logic Programs.
Proceedings of the International Conference on Parallel Processing, 1985

Fail-Softness Analysis of Tree-Based Local Area Networks.
Proceedings of the 5th International Conference on Distributed Computing Systems, 1985

1984
A State-of-the-Art SIMD Two-Dimensional FFT Array Processor.
Proceedings of the 11th Annual Symposium on Computer Architecture, 1984

1983
Lookahead network priority protocols.
Proceedings of the symposium on Communications Architectures & Protocols, 1983

Resource Allocation in Rectangular CC-Banyans
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983

Specification and Implementation of an Integrated Packet Communication Facility for an Array Computer.
Proceedings of the International Conference on Parallel Processing, 1983

1982
Lookahead networks.
Proceedings of the American Federation of Information Processing Societies: 1982 National Computer Conference, 1982

1981
Errata: A hardware support mechanism for scheduling resources in parallel machine environment: (from Proceedings of the 8th Annual Symposium on Computer Architecture, p. 57).
SIGARCH Comput. Archit. News, 1981

A Hardware Support Mechanism for Scheduling Resources in a Parallel Machine Environment.
Proceedings of the 8th Annual Symposium on Computer Architecture, 1981

1980
MOVE Architecture in Digital Controllers.
IEEE Trans. Computers, 1980

Reconfigurable Hierarchical Rings.
Proceedings of the Distributed Data Acquisition, Computing, and Control Symposium, 1980

An overview of the Texas reconfigurable array computer.
Proceedings of the American Federation of Information Processing Societies: 1980 National Computer Conference, 1980

Design and implementation of the banyan interconnection network in TRAC.
Proceedings of the American Federation of Information Processing Societies: 1980 National Computer Conference, 1980

Organization of the TRAC processor-memory subsystem.
Proceedings of the American Federation of Information Processing Societies: 1980 National Computer Conference, 1980

1979
The Architectural Features and Implementation Techniques of the Multicell CASSM.
IEEE Trans. Computers, 1979

Packet Switching in Banyan Networks.
Proceedings of the 6th Annual Symposium on Computer Architecture, 1979

1978
Just a few more words on microprocessors of the future.
SIGARCH Comput. Archit. News, 1978

Special Feature: Developments and Directions in Computer Architecture.
Computer, 1978

Semantic Paging on Intelligent Discs.
Proceedings of the Papers of the Fourth Workshop on Computer Architecture for Non-Numeric Processing, 1978

Architectural Features of CASSM: A Context Addressed Segment Sequential Memory.
Proceedings of the 5th Annual Symposium on Computer Architecture, 1978

On some parallel programming techniques.
Proceedings of the IEEE Computer Society's Second International Computer Software and Applications Conference, 1978

1977
On a Varistructured Array of Microprocessors.
IEEE Trans. Computers, 1977

A Post-Mortem on CASSM.
IEEE Database Eng. Bull., 1977

Hardware Description Languages: Voices from the Tower of Babel.
Computer, 1977

On Imaginary Fields, Token Transfers and Floating Codes in Intelligent Secondary Memories.
Proceedings of the SIGIR-SIGARCH-SIGMOD Third Workshop on Computer Architecture for Non-Numeric Processing, 1977

On Virtual Memories and Micronetworks.
Proceedings of the 4th Annual Symposium on Computer Architecture, 1977

An organization for optical linkages between integrated circuits.
Proceedings of the American Federation of Information Processing Societies: 1977 National Computer Conference, 1977

1976
Software Aspects of the CASSM System - Abstract.
SIGIR Forum, 1976

Implementation of a Context-Addressed Pipeline<sup>3</sup> SIMD Architecture - Abstract.
SIGIR Forum, 1976

A question of style.
SIGARCH Comput. Archit. News, 1976

A Self-Managing Secondary Memory System.
Proceedings of the 3rd Annual Symposium on Computer Architecture, 1976

Some Implementations of Segment Sequential Functions.
Proceedings of the 3rd Annual Symposium on Computer Architecture, 1976

SIGARCH (Paper Session).
Proceedings of the 1976 Annual Conference, Houston, Texas, USA, October 20-22, 1976, 1976

1975
On Non-numeric Architecture.
SIGIR Forum, 1975

CASSM: A Cellular System for Very Large Data Bases.
Proceedings of the International Conference on Very Large Data Bases, 1975

On residue number A/D and D/A converters.
Proceedings of the 3rd IEEE Symposium on Computer Arithmetic, 1975

1974
Switched Multiple Instruction, Multiple Data Stream Processing.
Proceedings of the 2nd Annual Symposium on Computer Architecture, 1974

A Virtual Memory for Microprocessors.
Proceedings of the 2nd Annual Symposium on Computer Architecture, 1974

1973
Retrieval Operations and Data Representations in a Context-Addressed Disc System.
Proceedings of the 1973 meeting on Programming languages and information retrieval, 1973

A Methodology for Parallel Processing Design Tradeoffs.
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973

A Varistructured Fail-Soft Cellular Computer.
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973

Banyan Networks for Partitioning Multiprocessor Systems.
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973

The Architecture of CASSM: A Cellular System for Non-numeric Processing.
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973

1972
On Generating Multipliers for a Cellular Fast Fourier Transform Processor.
IEEE Trans. Computers, 1972

Data structures in context-addressed cellular memories.
Int. J. Parallel Program., 1972

The architecture of a context addressed segment-sequential storage.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '72 Fall Joint Computer Conference, December 5-7, 1972, Anaheim, California, USA, 1972

A cellular processor for task assignments in polymorphic, multiprocessor computers.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '72 Fall Joint Computer Conference, December 5-7, 1972, Anaheim, California, USA, 1972

1971
On data structures in associative memories.
ACM SIGPLAN Notices, 1971

A generalized assembly language using regular expressions.
ACM SIGPLAN Notices, 1971

1970
The architecture of a large associative processor.
Proceedings of the American Federation of Information Processing Societies: AFIPS Conference Proceedings: 1970 Spring Joint Computer Conference, 1970

1969
The Architecture of a Large Distributed Logic Associative Processor
PhD thesis, 1969


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