G. Harish

According to our database1, G. Harish authored at least 8 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Design of High Speed 5: 2 and 7: 2 Compressor Using Nanomagnetic Logic.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

2015
Detection and analysis of hardware trojan using scan chain method.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Low power and hardware cost STUMPS BIST.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Modified low power scan based technique.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2013
Performance Analysis of Parallel Pollard's Rho Algorithm
CoRR, 2013

Heterogeneous network facility for distance education for parents and rehabilitation professionals in the field of intellectual disability.
Proceedings of the 2013 12th International Conference on Information Technology Based Higher Education and Training, 2013

2012
Evaluation and assessment tool for mentally challenged children.
Proceedings of the 2012 International Conference on Information Technology Based Higher Education and Training, 2012

Parallelization of Pollard's Rho Integer factorization algorithm.
Proceedings of the Second International Conference on Computational Science, 2012


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