G. Arutchelvan
According to our database1,
G. Arutchelvan
authored at least 2 papers
between 2010 and 2022.
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Bibliography
2022
Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2010
Inaccuracy Minimization by Partioning Fuzzy Data Sets - Validation of Analystical Methodology
CoRR, 2010