Fritjof Steinert

Orcid: 0000-0002-8733-3064

According to our database1, Fritjof Steinert authored at least 9 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol and its Application.
ACM Trans. Reconfigurable Technol. Syst., March, 2023

Enabling Communication with FPGA-based Network-attached Accelerators for HPC Workloads.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

FPGA-Based Network-Attached Accelerators - An Environmental Life Cycle Perspective.
Proceedings of the Architecture of Computing Systems - 36th International Conference, 2023

2022
Architecture of a Low Latency H.264/AVC Video Codec for Robust ML based Image Classification.
J. Signal Process. Syst., 2022

A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Demonstration of a Distributed Accelerator Framework for Energy-efficient ML Processing.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
A Hardware/Software Framework for the Integration of FPGA-based Accelerators into Cloud Computing Infrastructures.
Proceedings of the IEEE International Conference on Smart Cloud, 2020

A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol for Network-Attached Hardware Accelerators.
Proceedings of the International Conference on Field-Programmable Technology, 2020

Hardware and Software Components towards the Integration of Network-Attached Accelerators into Data Centers.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020


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