Friedrich Pauls

According to our database1, Friedrich Pauls authored at least 13 papers between 2013 and 2024.

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Bibliography

2024
Trustworthy Silicon: An MPSoC for a Secure Operating System.
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

Integration of IP-Cores for the M<sup>3</sup> Architecture with Low Area Overhead: Accelerator Support Module.
Proceedings of the 21st International SoC Design Conference, 2024

2023
Trust-minimized Integration of Third-Party Intellectual Property Cores.
Proceedings of the 20th International SoC Design Conference, 2023

2022
Trustworthy Computing for O-RAN: Security in a Latency-Sensitive Environment.
Proceedings of the IEEE Globecom 2022 Workshops, 2022

2021
Aspects of latency optimization for hash-based digital signatures.
PhD thesis, 2021

2019
Access Interval Prediction for Tightly Coupled Memory Systems.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

A Latency-Optimized Hash-Based Digital Signature Accelerator for the Tactile Internet.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2017
Modeling the Impact on Performance of Memory Pooling in Heterogeneous MPSoCs.
Proceedings of the 85th IEEE Vehicular Technology Conference, 2017


2016

2013
Evaluation of Efficient Modes of Operation of GSM/GPRS Modules for M2M Communications.
Proceedings of the 78th IEEE Vehicular Technology Conference, 2013

Towards elastic SDR architectures using dynamic task management.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013


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