Friedrich Hapke
Orcid: 0000-0001-8744-3039
According to our database1,
Friedrich Hapke
authored at least 35 papers
between 2003 and 2021.
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Bibliography
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
2018
DPPM Reduction Methods and New Defect Oriented Test Methods Applied to Advanced FinFET Technologies.
Proceedings of the IEEE International Test Conference, 2018
Proceedings of the IEEE International Test Conference, 2018
2017
Proceedings of the 22nd IEEE European Test Symposium, 2017
2016
Proceedings of the 21th IEEE European Test Symposium, 2016
2015
Proceedings of the VLSI Design, Automation and Test, 2015
Proceedings of the 2015 IEEE International Test Conference, 2015
2014
Proceedings of the 19th IEEE European Test Symposium, 2014
Proceedings of the 23rd IEEE Asian Test Symposium, 2014
2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013
2012
Proceedings of the 2012 IEEE International Test Conference, 2012
Introduction to the defect-oriented cell-aware test methodology for significant reduction of DPPM rates.
Proceedings of the 17th IEEE European Test Symposium, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
Cell-aware analysis for small-delay effects and production test results from different fault models.
Proceedings of the 2011 IEEE International Test Conference, 2011
2010
J. Electron. Test., 2010
Proceedings of the 2011 IEEE International Test Conference, 2010
2009
Proceedings of the 27th IEEE VLSI Test Symposium, 2009
Proceedings of the 10th Latin American Test Workshop, 2009
Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs.
Proceedings of the 2009 IEEE International Test Conference, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
2007
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Fault detection and diagnosis with parity trees for space compaction of test responses.
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003