Freeman Y. Zhong

According to our database, Freeman Y. Zhong authored at least 3 papers between 2010 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS.

Hao Li, Shuai Chen, Liqiong Yang, Rui Bai, Weiwu Hu, Freeman Y. Zhong, Samuel Palermo, Patrick Yin Chiang

Proceedings of the Symposium on VLSI Circuits, 2014

2012

A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS.

Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Kangmin Hu, Patrick Yin Chiang

IEEE J. Solid State Circuits, 2012

2010

Single-channel, 1.25-GS/s, 6-bit, loop-unrolled asynchronous SAR-ADC in 40nm-CMOS.

Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Patrick Yin Chiang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010