Frédéric Mailhot

Affiliations:
  • Université de Sherbrooke, Department of Electrical and Computer Engineering, QC, Canada
  • Synopsys Inc., Mountain View, CA, USA
  • Stanford University, CA, USA (PhD)


According to our database1, Frédéric Mailhot authored at least 14 papers between 1988 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2023
Automated Generation of Shuttling Sequences for a Linear Segmented Ion Trap Quantum Computer.
Quantum, November, 2023

2022
SCADA Radio Blackbox Reverse Engineering.
Proceedings of the Foundations and Practice of Security - 15th International Symposium, 2022

2019
A Common Recursive Form for Multiple Fundamental Arithmetic Operators and its Automated Synthesis.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2015
Efficient event-driven approach using synchrony processing for hardware spiking neural networks.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Live demonstration: Efficient event-driven approach using synchrony processing for hardware spiking neural networks.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2013
Event management for large scale event-driven digital hardware spiking neural networks.
Neural Networks, 2013

2011
FPGA implementation of a spiking neural network for pattern matching.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

1994
Boolean Matching of Sequential Elements.
Proceedings of the 31st Conference on Design Automation, 1994

1993
Algorithms for technology mapping based on binary decision diagrams and on Boolean operations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Technology Independent Boundary Scan Synthesis (Technology and Physical Issues).
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991
Technology mapping for a two-output RAM-based field programmable gate array.
Proceedings of the conference on European design automation, 1991

1990
The Olympus Synthesis System.
IEEE Des. Test Comput., 1990

Technology mapping using boolean matching and don't care sets.
Proceedings of the European Design Automation Conference, 1990

1988
Automatic layout and optimization of static CMOS cells.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988


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