Freddy Forero

According to our database, Freddy Forero authored at least 11 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

B-open Defect: A Novel Defect Model in FinFET Technology.

Freddy Forero, Víctor H. Champac, Michel Renovell

ACM J. Emerg. Technol. Comput. Syst., January, 2023

A New Defect Model due to a Dust Particle Affecting the Fingers of FinFET Logic Gates.

Víctor H. Champac, Freddy Forero, Michel Renovell, Leonardo Miceli

Proceedings of the 24th IEEE Latin American Test Symposium, 2023

2019

Modeling and Detectability of Full Open Gate Defects in FinFET Technology.

Freddy Forero, Hector Villacorta, Michel Renovell, Víctor H. Champac

IEEE Trans. Very Large Scale Integr. Syst., 2019

A Semi-analytical Model for Interconnect Open Defects in FinFET Logic Cells.

Freddy Forero, Jean-Marc Gallière, Michel Renovell, Víctor H. Champac

Proceedings of the IEEE Latin American Test Symposium, 2019

B-open: A New Defect in Nanometer Technologies due to SADP Process.

Freddy Forero, Michel Renovell, Víctor H. Champac

Proceedings of the 24th IEEE European Test Symposium, 2019

2018

Detectability Challenges of Bridge Defects in FinFET Based Logic Cells.

Freddy Forero, Jean-Marc Gallière, Michel Renovell, Víctor H. Champac

J. Electron. Test., 2018

Robust Detection of Bridge Defects in STT-MRAM Cells Under Process Variations.

Andres F. Gomez, Freddy Forero, Kaushik Roy, Víctor H. Champac

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Analysis of Bridge Defects in STT-MRAM Cells Under Process Variations and a Robust DFT Technique for Their Detection.

Víctor H. Champac, Andres F. Gomez, Freddy Forero, Kaushik Roy

Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

2017

Analysis of short defects in FinFET based logic cells.

Freddy Forero, Jean-Marc Gallière, Michel Renovell, Víctor H. Champac

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

2016

Improvement of Negative Bias Temperature Instability Circuit Reliability and Power Consumption Using Dual Supply Voltage.

Freddy Forero, Andres F. Gomez, Víctor H. Champac

J. Low Power Electron., 2016

A methodology for NBTI circuit reliability at reduced power consumption using dual supply voltage.

Freddy Forero, Andres F. Gomez, Víctor H. Champac

Proceedings of the 17th Latin-American Test Symposium, 2016