Franz Kuttner

According to our database1, Franz Kuttner authored at least 11 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2017
13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2011
A digitally controlled DC-DC converter for SoC in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A fully digital multimode polar transmitter employing 17b RF DAC in 3G mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2008
A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006
A 14b 100MS/s digitally self-calibrated pipelined ADC in 0.13µm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-μm digital CMOS.
IEEE J. Solid State Circuits, 2005

A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS.
IEEE J. Solid State Circuits, 2005

2004
A 6bit, 1.2GSps low-power flash-ADC in 0.13μm digital CMOS.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process.
Proceedings of the ESSCIRC 2003, 2003

2002
A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002


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