Frank O'Mahony

Orcid: 0000-0001-7961-9452

According to our database¹, Frank O'Mahony authored at least 44 papers between 2003 and 2024.

Collaborative distances:

Dijkstra number² of three.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2024

Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2023

2022

A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET.

[BibT_eX]

[DOI]

Savyasaachi Keshava Murthy

IEEE J. Solid State Circuits, 2022

Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing.

[BibT_eX]

[DOI]

Srikrishnan Venkataraman

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS.

[BibT_eX]

[DOI]

Hariprasath Venkataraman

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS.

[BibT_eX]

[DOI]

Savyassachi Keshava Murthy

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm<sup>2</sup>, 1mm Package-on-Package.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019

A 112 Gb/s PAM-4 56 Gb/s NRZ Reconfigurable Transmitter With Three-Tap FFE in 10-nm FinFET.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2019

2018

Session 25 overview: Clock generation for high-speed links: Wireline subcommittee.

[BibT_eX]

[DOI]

Roberto Nonis

Pavan Kumar Hanumolu

Frank O'Mahony

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Session 6 overview: Ultra-high-speed wireline: Wireline subcommittee.

[BibT_eX]

[DOI]

Mounir Meghelli

Hyeon-Min Bae

Frank O'Mahony

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 112Gb/s PAM-4 transmitter with 3-Tap FFE in 10nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Session 16 overview: Advanced optical and wireline techniques: Wireline subcommittee.

[BibT_eX]

[DOI]

Azita Emami

Andrew K. Joy

Frank O'Mahony

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

Session 29 overview: Optical- and electrical-link innovations.

[BibT_eX]

[DOI]

Samuel Palermo

Hideyuki Nosaka

Frank O'Mahony

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 6 overview: Ultra-high-speed wireline.

[BibT_eX]

[DOI]

Simone Erba

Takayuki Shibasaki

Frank O'Mahony

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016

Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O.

[BibT_eX]

[DOI]

Ishita Mukhopadhyay

Mustansir Yunus Mukadam

Rajendran Narayanan

Frank O'Mahony

Alyssa B. Apsel

IEEE Trans. Very Large Scale Integr. Syst., 2016

Session 23 overview: Electrical and optical link innovations.

[BibT_eX]

[DOI]

Frank O'Mahony

Simone Erba

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

EP3: Innovating on the tapeout treadmill.

[BibT_eX]

[DOI]

Jack Kenney

Frank O'Mahony

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

10.5 A 5.9pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

F6: I/O design at 25Gb/s and beyond: Enabling the future communication infrastructure for big data.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the Symposium on VLSI Circuits, 2014

F6: Energy-efficient I/O design for next-generation systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2013

A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Design considerations for low-power receiver front-end in high-speed data links.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

An on-die all-digital delay measurement circuit with 250fs accuracy.

[BibT_eX]

[DOI]

Mozhgan Mansuri

Bryan Casper

Frank O'Mahony

Proceedings of the Symposium on VLSI Circuits, 2012

2010

A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 5-to-25Gb/s 1.6-to-3.8mW/(Gb/s) reconfigurable transceiver in 45nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Varactor-based signal restoration for near-speed-of-light surfing global interconnect.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links - A Tutorial.

[BibT_eX]

[DOI]

Bryan Casper

Frank O'Mahony

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Strong injection locking of low-Q LC oscillators.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006

A 20Gb/s Embedded Clock Transceiver in 90nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A low-power, 20-Gb/s continuous-time adaptive passive equalizer.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003

A 10-GHz global clock distribution using coupled standing-wave oscillators.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

On-Chip Interconnect Inductance - Friend or Foe (Invited).

[BibT_eX]

[DOI]

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Design of a 10GHz clock distribution network using coupled standing-wave oscillators.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Frank O'Mahony

Timeline

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