Frank Lee
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2024
An On-Chip Current-Sink-Free Adaptive-Timing Power Impedance Measurement (PIM) Unit for 3D-IC in 5nm FinFET Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
A 0.296pJ/bit 17.9Tb/s/mm<sup>2</sup> Die-to-Die Link in 5nm/6nm FinFET on a 9μm-Pitch 3D Package Achieving 10.24Tb/s Bandwidth at 16Gb/s PAM-4.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Scan Design Using Unsupervised Machine Learning to Reduce Functional Timing and Area Impact.
Proceedings of the IEEE European Test Symposium, 2024
2023
Proceedings of the 1st Workshop on Security of Space and Satellite Systems, SpaceSec 2023, 2023
2022
Homophily and peer-consumer behaviour in a peer-to-peer accommodation sharing economy platform.
Behav. Inf. Technol., 2022
2020
IEEE J. Solid State Circuits, 2020
Proceedings of the 2020 Web Archiving & Digital Libraries Workshop (WADL 2020), 2020
2019
Unveiling the interplay between blockchain and loyalty program participation: A qualitative approach based on Bubichain.
Int. J. Inf. Manag., 2019
A 7nm 4GHz Arm<sup>®</sup>-core-based CoWoS<sup>®</sup> Chiplet Design for High Performance Computing.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 25th Americas Conference on Information Systems, 2019
2015
Large-scale machine learning based on functional networks for biomedical big data with high performance computing platforms.
J. Comput. Sci., 2015
Efficient observation-point insertion for diagnosability enhancement in digital circuits.
Proceedings of the 2015 IEEE International Test Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Design-for-diagnosis: Your safety net in catching design errors in known good dies in CoWoS<sup>TM</sup>/3D ICs.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
2013
Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study.
Proceedings of the 2013 IEEE International Test Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Microelectron. Reliab., 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.
Proceedings of the 2012 IEEE International Test Conference, 2012
2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
1999
Using constructors and subclasses in java and C++.
Proceedings of the Computers and Their Applications (CATA-99), 1999
1988
1987
Structural analysis of the mouse chromosomal gene encoding interleukin 4 which expresses B cell, T cell and mast cell stimulating activities.
Nucleic Acids Res., 1987
1985
Proceedings of the Kommunikation in Verteilten Systemen I, 1985