François Andrieu
According to our database1,
François Andrieu
authored at least 44 papers
between 2009 and 2024.
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Bibliography
2024
First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Data Retention Insights from Joint Analysis on BEOL-Integrated HZO-Based Scaled FeCAPs and 16kbit 1T-1C FeRAM Arrays.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024
Charge-based Sense Demonstration in 1T-1C HZO FeRAM Arrays to Overcome CBL-induced Bank Size Limitations.
Proceedings of the IEEE International Memory Workshop, 2024
2023
Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell.
CoRR, 2023
1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Reliability assessment of hafnia-based ferroelectric devices and arrays for memory and AI applications (Invited).
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Memory Window in Si: HfO2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes.
Proceedings of the IEEE International Memory Workshop, 2023
Integration of HfO2-based 3D OxRAM with GAA stacked-nanosheet transistor for high-density embedded memory.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Multilayer Deposition in Phase-Change Memory for Best Endurance Performance and Reduced Bit Error Rate.
Proceedings of the IEEE International Memory Workshop, 2022
Proceedings of the IEEE International Memory Workshop, 2022
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.
Proceedings of the IEEE International Memory Workshop, 2022
Proceedings of the IEEE International Memory Workshop, 2022
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
Multilayer Structure in SeAsGeSi-based OTS for High Thermal Stability and Reliability Enhancement.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
Frequency modulation of conductance level in PCM device for neuromorphic applications.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
Interplay between charge trapping and polarization switching in MFDM stacks evidenced by frequency-dependent measurements.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
2020
Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications.
CoRR, 2020
2018
A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018
2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2016
Proceedings of the International Conference on IC Design and Technology, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
Performance and reliability of strained SOI transistors for advanced planar FDSOI technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
2014
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014
Proceedings of the 44th European Solid State Device Research Conference, 2014
Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes.
Proceedings of the 44th European Solid State Device Research Conference, 2014
Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014
2013
Proceedings of the European Solid-State Device Research Conference, 2013
Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets.
Proceedings of the European Solid-State Device Research Conference, 2013
2012
Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below.
J. Low Power Electron., 2012
Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below.
Proceedings of the 35th European Solid-State Circuits Conference, 2009