Francisco J. Cazorla

According to our database, Francisco J. Cazorla authored at least 250 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

Artificial Intelligence for Safety-Critical Systems in Industrial and Transportation Domains: A Survey.

Jon Pérez-Cerrolaza, Jaume Abella, Markus Borg, Carlo Donzella, Jesús Cerquides, Francisco J. Cazorla, Cristofer Englund, Markus Tauber, George Nikolakopoulos, Jose Luis Flores

ACM Comput. Surv., July, 2024

XeroZerox: Analysis and Optimization of GPU Memory Management for High-Integrity Autonomous Systems.

Alejandro J. Calderón, Leonidas Kosmidis, Carlos F. Nicolás, Francisco J. Cazorla

IEEE Access, 2024

Increasing Testing Robustness of GPU Software in Embedded Critical Systems.

Javier Barrera, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 39th ACM/SIGAPP Symposium on Applied Computing, 2024

Safety-Relevant AI-Based System Robustification with Neural Network Ensembles.

Adrià Aldomà, Axel Brando, Francisco J. Cazorla, Jaume Abella

Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024

Achieving Flexible Performance Isolation on the AMD Xilinx Zynq UltraScale+.

Alejandro Serrano-Cases, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

Event Monitor Validation in High-Integrity Systems.

Roger Pujol, Sergi Vilardell, Enrico Mezzetti, Mohamed Hassan, Jaume Abella, Francisco J. Cazorla

Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

TAP: Task-Aware Profiling on Integrated Systems.

Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

2023

Main sources of variability and non-determinism in AD software: taxonomy and prospects to handle them.

Miguel Alcon, Axel Brando, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Real Time Syst., September, 2023

Dynamic and execution views to improve validation, testing, and optimization of autonomous driving software.

Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Softw. Qual. J., June, 2023

On Neural Networks Redundancy and Diversity for Their Use in Safety-Critical Systems.

Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jon Pérez-Cerrolaza, Jaume Abella

Computer, May, 2023

Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems.

Roger Pujol, Josep Jorba, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

ACM Trans. Embed. Comput. Syst., March, 2023

Uncertainty Management in Dependable and Intelligent Embedded Software.

Jon Pérez-Cerrolaza, Francisco J. Cazorla, Jaume Abella

Computer, March, 2023

Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

ACM Trans. Design Autom. Electr. Syst., 2023

An automotive case study on the limits of approximation for object detection.

Martí Caro, Hamid Tabani, Jaume Abella, Francesc Moll, Enric Morancho, Ramon Canal, Josep Altet, Antonio Calomarde, Francisco J. Cazorla, Antonio Rubio, Pau Fontova, Jordi Fornt

J. Syst. Archit., 2023

GPU Devices for Safety-Critical Systems: A Survey.

Jon Pérez-Cerrolaza, Jaume Abella, Leonidas Kosmidis, Alejandro J. Calderón, Francisco J. Cazorla, Jose Luis Flores

ACM Comput. Surv., 2023

SafeLS: Toward Building a Lockstep NOEL-V Core.

Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella

CoRR, 2023

Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains.

Jaume Abella, Francisco J. Cazorla, Sergi Alcaide, Michael Paulitsch, Yang Peng, Inês Pinto Gouveia

CoRR, 2023

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.

Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino

CoRR, 2023

Tracking Coherence-Related Contention Delays in Real-Time Multicore Systems.

Roger Pujol, Mohamed Hassan, Hamid Tabani, Jaume Abella, Francisco Javier Cazorla-Almeida

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs.

Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella, Francisco Javier Cazorla-Almeida

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels.

Nikolaos Andriotis, Alejandro Serrano-Cases, Sergi Alcaide, Jaume Abella, Francisco J. Cazorla, Yang Peng, Andrea Baldovin, Michael Paulitsch, Vladimir Tsymbal

Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

Improving Timing-Related Guarantees for Main Memory in Multicore Critical Embedded Systems.

Asier Fernández de Lecea, Mohamed Hassan, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time Systems Symposium, 2023

SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core.

Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.

Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino

Proceedings of the IEEE European Test Symposium, 2023

Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures.

Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023

SAFEXPLAIN: Safe and Explainable Critical Embedded Systems Based on AI.

Jaume Abella, Jon Pérez, Cristofer Englund, Bahram Zonooz, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Isabel Serra, Axel Brando, Irune Agirre, Fernando Eizaguirre, Thanh Hai Bui, Elahe Arani, Fahad Sarfraz, Ajay Balasubramaniam, Ahmed Badar, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Davide Brighenti, Davide Cunial

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Standardizing the Probabilistic Sources of Uncertainty for the sake of Safety Deep Learning.

Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jaume Abella

Proceedings of the Workshop on Artificial Intelligence Safety 2023 (SafeAI 2023) co-located with the Thirty-Seventh AAAI Conference on Artificial Intelligence (AAAI 2023), 2023

2022

ADBench: benchmarking autonomous driving systems.

Hamid Tabani, Roger Pujol, Miguel Alcon, Joan Moya, Jaume Abella, Francisco J. Cazorla

Computing, 2022

A Methodology for Selective Protection of Matrix Multiplications: A Diagnostic Coverage and Performance Trade-off for CNNs Executed on GPUs.

Javier Fernández, Irune Agirre, Jon Pérez-Cerrolaza, Jaume Abella, Francisco J. Cazorla

Proceedings of the 6th International Conference on System Reliability and Safety, 2022

Contention Tracking in GPU Last-Level Cache.

Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Using Markov's Inequality with Power-Of-k Function for Probabilistic WCET Estimation.

Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Joan del Castillo

Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

Using Quantile Regression in Neural Networks for Contention Prediction in Multicore Processors.

Axel Brando, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

2021

Safe and secure software updates on high-performance mixed-criticality systems: The UP2DATE approach.

Irune Agirre, Irune Yarza, Imanol Mugarza, Jacopo Binchi, Peio Onaindia, Tomaso Poggi, Francisco J. Cazorla, Leonidas Kosmidis, Kim Grüttner, Patrick Uven, Mohammed Abuteir, Jan Loewe, Juan M. Orbegozo, Stefania Botta

Microprocess. Microsystems, November, 2021

Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Sustain. Comput., 2021

Surrogate Applications for Early Design Stage Multicore Contention Modeling.

Gabriel Fernandez, Jaume Abella, Guillem Bernat, Francisco J. Cazorla

IEEE Trans. Emerg. Top. Comput., 2021

Towards functional safety compliance of matrix-matrix multiplication for machine learning-based autonomous systems.

Javier Fernández, Jon Pérez, Irune Agirre, Imanol Allende, Jaume Abella, Francisco J. Cazorla

J. Syst. Archit., 2021

Performance Analysis and Optimization Opportunities for NVIDIA Automotive GPUs.

Hamid Tabani, Fabio Mazzocchetti, Pedro Benedicte, Jaume Abella, Francisco J. Cazorla

J. Parallel Distributed Comput., 2021

Multi-core Devices for Safety-critical Systems: A Survey.

Jon Pérez-Cerrolaza, Roman Obermaisser, Jaume Abella, Francisco J. Cazorla, Kim Grüttner, Irune Agirre, Hamidreza Ahmadian, Imanol Allende

ACM Comput. Surv., 2021

MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs.

Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

PRL: Standardizing Performance Monitoring Library for High-Integrity Real-Time Systems.

Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems.

Kazi Asifuzzaman, Mohamed Abuelala, Mohamed Hassan, Francisco J. Cazorla

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC.

Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 33rd Euromicro Conference on Real-Time Systems, 2021

Enabling Unit Testing of Already-Integrated AI Software Systems: The Case of Apollo for Autonomous Driving.

Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Empirical Evidence for MPSoCs in Critical Systems: The Case of NXP's T2080 Cache Coherence.

Roger Pujol, Hamid Tabani, Jaume Abella, Mohamed Hassan, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

GMAI: Understanding and Exploiting the Internals of GPU Resource Allocation in Critical Systems.

Alejandro J. Calderón, Leonidas Kosmidis, Carlos F. Nicolás, Francisco J. Cazorla, Peio Onaindia

ACM Trans. Embed. Comput. Syst., 2020

HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs.

Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

GPU4S: Embedded GPUs in space - Latest project updates.

Leonidas Kosmidis, Iván Rodriguez, Álvaro Jover, Sergi Alcaide, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari

Microprocess. Microsystems, 2020

CleanET: enabling timing validation for complex automotive systems.

Sergi Vilardell, Isabel Serra, Hamid Tabani, Jaume Abella, Joan del Castillo, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

IntPred: flexible, fast, and accurate object detection for autonomous driving systems.

Hamid Tabani, Matteo Fusi, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

On the reliability of hardware event monitors in MPSoCs for critical domains.

Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Enrico Mezzetti, Jaume Abella, Mikel Fernández, Guillem Bernat, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

En-Route: on enabling resource usage testing for autonomous driving frameworks.

Miguel Alcon, Hamid Tabani, Jaume Abella, Leonidas Kosmidis, Francisco J. Cazorla

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP).

Jeremy Giesen, Pedro Benedicte, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

Timing of Autonomous Driving Software: Problem Analysis and Prospects for Future Solutions.

Miguel Alcon, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

A Cross-Layer Review of Deep Learning Frameworks to Ease Their Optimization and Reuse.

Hamid Tabani, Roger Pujol, Jaume Abella, Francisco J. Cazorla

Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020

Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study.

Xavier Palomo, Mikel Fernández, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux

Proceedings of the 32nd Euromicro Conference on Real-Time Systems, 2020

UP2DATE: Safe and secure over-the-air software updates on high-performance mixed-criticality systems.

Irune Agirre, Peio Onaindia, Tomaso Poggi, Irune Yarza, Francisco J. Cazorla, Leonidas Kosmidis, Kim Grüttner, Mohammed Abuteir, Jan Loewe, Juan M. Orbegozo, Stefania Botta

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

An Academic RISC-V Silicon Implementation Based on Open-Source Components.

Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

An On-board Algorithm Implementation on an Embedded GPU: A Space Case Study.

Iván Rodriguez, Leonidas Kosmidis, Olivier Notebaert, Francisco J. Cazorla, David Steenari

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Increasing the Reliability of Software Timing Analysis for Cache-Based Processors.

Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Computers, 2019

Locality-aware cache random replacement policies.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

J. Syst. Archit., 2019

Time-Randomized Wormhole NoCs for Critical Applications.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

ACM J. Emerg. Technol. Comput. Syst., 2019

Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors.

David Trilla, Francisco J. Cazorla, Carles Hernández, Jaume Abella

IEEE Des. Test, 2019

Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey.

Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega

ACM Comput. Surv., 2019

ePAPI: Performance Application Programming Interface for Embedded Platforms.

Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Enrique Fernández, Francisco J. Cazorla

Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis, 2019

Performance Analysis and Optimization of Automotive GPUs.

Fabio Mazzocchetti, Pedro Benedicte, Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the 31st International Symposium on Computer Architecture and High Performance Computing, 2019

On assessing the viability of probabilistic scheduling with dependent tasks.

Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems.

Xavier Palomo, Enrico Mezzetti, Jaume Abella, Reinder J. Bril, Francisco J. Cazorla

Proceedings of the 25th IEEE Real-Time and Embedded Technology and Applications Symposium, 2019

STT-MRAM for real-time embedded systems: performance and WCET implications.

Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla

Proceedings of the International Symposium on Memory Systems, 2019

Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis.

Sergi Vilardell, Isabel Serra, Jaume Abella, Joan del Castillo, Francisco J. Cazorla

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Understanding and Exploiting the Internals of GPU Resource Allocation for Critical Systems.

Alejandro J. Calderón, Leonidas Kosmidis, Carlos F. Nicolás, Francisco J. Cazorla, Peio Onaindia

Proceedings of the International Conference on Computer-Aided Design, 2019

Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier.

Roger Pujol, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

GPU4S: Embedded GPUs in Space.

Leonidas Kosmidis, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

AURIX TC277 Multicore Contention Model Integration for Automotive Applications.

Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain.

Mikel Fernández, Gabriel Fernandez, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines.

Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla, Guillem Bernat

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Towards limiting the impact of timing anomalies in complex real-time processors.

Pedro Benedicte, Jaume Abella, Carles Hernández, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262.

Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega

IEEE Trans. Reliab., 2018

EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems.

Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V.

Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

IEEE Micro, 2018

Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain.

Sergi Alcaide, Leonidas Kosmidis, Hamid Tabani, Carles Hernández, Jaume Abella, Francisco J. Cazorla

IEEE Micro, 2018

Reconciling Time Predictability and Performance in Future Computing Systems.

Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat

IEEE Des. Test, 2018

Assessing Time Predictability Features of ARM Big. LITTLE Multicores.

Gabriel Fernandez, Francisco J. Cazorla, Jaume Abella, Sylvain Girbal

Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

RPR: a random replacement policy with limited pathological replacements.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores.

Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

Industrial experiences with resource management under software randomization in ARINC653 avionics environments.

Leonidas Kosmidis, Cristian Maxim, Victor Jégu, Francis Vatrinet, Francisco J. Cazorla

Proceedings of the International Conference on Computer-Aided Design, 2018

HWP: Hardware Support to Reconcile Cache Energy, Complexity, Performance and WCET Estimates in Multicore Real-Time Systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

Design and integration of hierarchical-placement multi-level caches for real-time systems.

Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Cache side-channel attacks and time-predictability in high-performance critical real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

Measurement-based cache representativeness on multipath programs.

Suzana Milutinovic, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

Modelling multicore contention on the AURIX^<i>TM</i> TC27x.

Enrique Díaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation.

Jaume Abella, Maria Padilla, Joan del Castillo, Francisco J. Cazorla

ACM Trans. Design Autom. Electr. Syst., 2017

Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

IEEE Trans. Computers, 2017

Adapting TDMA arbitration for measurement-based probabilistic timing analysis.

Milos Panic, Jaume Abella, Eduardo Quiñones, Carles Hernández, Theo Ungerer, Francisco J. Cazorla

Microprocess. Microsystems, 2017

Execution time distributions in embedded safety-critical systems using extreme value theory.

Joan del Castillo, Maria Padilla, Jaume Abella, Francisco J. Cazorla

Int. J. Data Anal. Tech. Strateg., 2017

On the assessment of probabilistic WCET estimates reliability for arbitrary programs.

Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla

EURASIP J. Embed. Syst., 2017

Modelling bus contention during system early design stages.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

On uses of extreme value theory fit for industrial-quality WCET analysis.

Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

On the tailoring of CAST-32A certification guidance to real COTS multicore architectures.

Irune Agirre, Jaume Abella, Mikel Azkarate-askasua, Francisco J. Cazorla

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

Work-in-Progress Paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling.

Enrico Mezzetti, Jaume Abella, Carles Hernández, Francisco J. Cazorla

Proceedings of the 2017 IEEE Real-Time Systems Symposium, 2017

EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application.

Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study.

Carles Hernández, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros, Franck Wartel

Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Euromicro Conference on Digital System Design, 2017

Design and implementation of a fair credit-based bandwidth sharing scheme for buses.

Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Probabilistic timing analysis on time-randomized platforms for the space domain.

Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Dynamic software randomisation: Lessons learnec from an aerospace case study.

Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Software Time Reliability in the Presence of Cache Memories.

Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding.

Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

2016

DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Design Autom. Electr. Syst., 2016

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.

Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

ACM Trans. Embed. Comput. Syst., 2016

Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach.

Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

IEEE Trans. Computers, 2016

Sensible Energy Accounting with Abstract Metering for Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez, Mateo Valero

ACM Trans. Archit. Code Optim., 2016

Fitting processor architectures for measurement-based probabilistic timing analysis.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla

Microprocess. Microsystems, 2016

Measurement-Based Timing Analysis of the AURIX Caches.

Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis.

Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-askasua, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems.

Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Contention-aware performance monitoring counte support for real-time MPSoCs.

Javier Jalle, Mikel Fernández, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Modelling the confidence of timing analysis for time randomised caches.

Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore.

Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the Computer Safety, Reliability, and Security, 2016

Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems.

David Trilla, Javier Jalle, Mikel Fernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems.

Milos Panic, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns.

Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla

Proceedings of the 19th IEEE International Symposium on Real-Time Distributed Computing, 2016

Resilient random modulo cache memories for probabilistically-analyzable real-time systems.

David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

A confidence assessment of WCET estimates for software time randomized caches.

Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

TASA: toolchain-agnostic static software randomisation for critical real-time systems.

Leonidas Kosmidis, Roberto Vargas, David Morales, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems.

Mladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis.

Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Improving performance guarantees in wormhole mesh NoC designs.

Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Supertask: Maximizing runnable-level parallelism in AUTOSAR applications.

Sebastian Kehr, Milos Panic, Eduardo Quiñones, Bert Böddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla, Günter Schäfer

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Random modulo: a new processor cache design for real-time critical systems.

Carles Hernández, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems.

Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Leibniz Trans. Embed. Syst., 2015

WCET analysis methods: Pitfalls and challenges on their trustworthiness.

Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Introduction to partial time composability for COTS multicores.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis.

Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Increasing multicore system efficiency through intelligent bandwidth shifting.

Víctor Jiménez, Alper Buyuktosunoglu, Pradip Bose, Francis P. O'Connell, Francisco J. Cazorla, Mateo Valero

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores.

Milos Panic, Eduardo Quiñones, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Enabling TDMA Arbitration in the Context of MBPTA.

Milos Panic, Jaume Abella, Carles Hernández, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis.

Irune Agirre, Mikel Azkarate-askasua, Carles Hernández, Jaume Abella, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Timing analysis of an avionics case study on complex hardware/software platforms.

Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

PACO: fast average-performance estimation for time-randomized caches.

Suzana Milutinovic, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Resource usage templates and signatures for COTS multicore processors.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Increasing confidence on measurement-based contention bounds for real-time round-robin buses.

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 52nd Annual Design Automation Conference, 2015

Speeding up Static Probabilistic Timing Analysis.

Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quiñones, Isabelle Puaut, Francisco J. Cazorla

Proceedings of the Architecture of Computing Systems - ARCS 2015, 2015

A Safety Concept for a Railway Mixed-Criticality Embedded System Based on Multicore Partitioning.

Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

2014

Adaptive Prefetching on POWER7: Improving Performance and Power Consumption.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Pradip Bose, Francis P. O'Connell, Bruce G. Mealey

ACM Trans. Parallel Comput., 2014

Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation.

Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Design Autom. Electr. Syst., 2014

Efficient Cache Designs for Probabilistically Analysable Real-Time Systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

IEEE Trans. Computers, 2014

Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

IEEE Micro, 2014

Per-task Energy Accounting in Computing Systems.

Qixiao Liu, Víctor Jiménez, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

IEEE Comput. Archit. Lett., 2014

Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art.

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.

Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014

AHRB: A high-performance time-composable AMBA AHB bus.

Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

DReAM: Per-Task DRAM Energy Metering in Multicore Systems.

Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the Euro-Par 2014 Parallel Processing, 2014

Parallel many-core avionics systems.

Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2014 International Conference on Embedded Software, 2014

PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis.

Leonidas Kosmidis, Jaume Abella, Franck Wartel, Eduardo Quiñones, Antoine Colin, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA.

Jaume Abella, Eduardo Quiñones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques.

Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Bus designs for time-probabilistic multicore processors.

Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Glenn Farrall, Franck Wartel, Francisco J. Cazorla

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores.

Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Jaume Abella, Francisco J. Cazorla

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013

Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors.

Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

IEEE Trans. Parallel Distributed Syst., 2013

Timing effects of DDR memory systems in hard real-time multicore architectures: Issues and solutions.

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla

ACM Trans. Embed. Comput. Syst., 2013

A hard real-time capable multi-core SMT processor.

Marco Paolieri, Jörg Mische, Stefan Metzlaff, Mike Gerdes, Eduardo Quiñones, Sascha Uhrig, Theo Ungerer, Francisco J. Cazorla

ACM Trans. Embed. Comput. Syst., 2013

PROARTIS: Probabilistically Analyzable Real-Time Systems.

Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery D. Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim

ACM Trans. Embed. Comput. Syst., 2013

SMT Malleability in IBM POWER5 and POWER6 Processors.

Alessandro Morari, Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero

IEEE Trans. Computers, 2013

Fair CPU time accounting in CMP+SMT processors.

Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Mateo Valero

ACM Trans. Archit. Code Optim., 2013

Hardware support for accurate per-task energy metering in multicore systems.

Qixiao Liu, Miquel Moretó, Víctor Jiménez, Jaume Abella, Francisco J. Cazorla, Mateo Valero

ACM Trans. Archit. Code Optim., 2013

Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources.

Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Upper-bounding Program Execution Time with Extreme Value Theory.

Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study.

Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Deconstructing bus access control policies for Real-Time multicores.

Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

On-chip ring network designs for hard-real time systems.

Milos Panic, Germán Rodríguez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla

Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013

Achieving timing composability with measurement-based probabilistic timing analysis.

Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis.

Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.

Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Probabilistic timing analysis on conventional cache designs.

Leonidas Kosmidis, Charlie Curtsinger, Eduardo Quiñones, Jaume Abella, Emery D. Berger, Francisco J. Cazorla

Proceedings of the Design, Automation and Test in Europe, 2013

A cache design for probabilistically analysable real-time systems.

Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the Design, Automation and Test in Europe, 2013

On the convergence of mainstream and mission-critical markets.

Sylvain Girbal, Miquel Moretó, Arnaud Grasset, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Sami Yehia

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

CPU Accounting for Multicore Processors.

Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero

IEEE Trans. Computers, 2012

On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments.

Petar Radojkovic, Sylvain Girbal, Arnaud Grasset, Eduardo Quiñones, Sami Yehia, Francisco J. Cazorla

ACM Trans. Archit. Code Optim., 2012

Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem.

Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Alex Ramírez, Francisco J. Cazorla

Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Characterizing thread placement in the IBM POWER7 processor.

Stelios Manousopoulos, Miquel Moretó, Roberto Gioiosa, Nectarios Koziris, Francisco J. Cazorla

Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012

Assessing the suitability of the NGMP multi-core processor in the space domain.

Mikel Fernández, Roberto Gioiosa, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla

Proceedings of the 12th International Conference on Embedded Software, 2012

Measurement-Based Probabilistic Timing Analysis for Multi-path Programs.

Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla

Proceedings of the 24th Euromicro Conference on Real-Time Systems, 2012

Optimal task assignment in multithreaded processors: a statistical approach.

Petar Radojkovic, Vladimir Cakarevic, Miquel Moretó, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

Making data prefetch smarter: adaptive prefetching on POWER7.

Víctor Jiménez, Roberto Gioiosa, Francisco J. Cazorla, Alper Buyuktosunoglu, Pradip Bose, Francis P. O'Connell

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Dynamic Cache Partitioning Based on the MLP of Cache Misses.

Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

Trans. High Perform. Embed. Archit. Compil., 2011

Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systems.

Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Mateo Valero

SIGBED Rev., 2011

Energy-Aware Accounting and Billing in Large-Scale Computing Facilities.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Eren Kursun, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero

IEEE Micro, 2011

Characterizing Power and Temperature Behavior of POWER6-Based System.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

IA^3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems.

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Robert I. Davis, Mateo Valero

Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011

A Software-Pipelined Approach to Multicore Execution of Timing Predictable Multi-threaded Hard Real-Time Tasks.

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Julian Wolf, Theo Ungerer, Sascha Uhrig, Zlatko Petrov

Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2011

A Quantitative Analysis of OS Noise.

Alessandro Morari, Roberto Gioiosa, Robert W. Wisniewski, Francisco J. Cazorla, Mateo Valero

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

RVC-based time-predictable faulty caches for safety-critical systems.

Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Towards improved survivability in safety-critical systems.

Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

RVC: a mechanism for time-analyzable real-time processors with faulty caches.

Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero

Proceedings of the High Performance Embedded Architectures and Compilers, 2011

Hybrid high-performance low-power and ultra-low energy reliable caches.

Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero

Proceedings of the 8th Conference on Computing Frontiers, 2011

2010

On the Problem of Evaluating the Performance of Multiprogrammed Workloads.

Francisco J. Cazorla, Alex Pajuelo, Oliverio J. Santana, Enrique Fernández, Mateo Valero

IEEE Trans. Computers, 2010

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability.

Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische

IEEE Micro, 2010

Trends and techniques for energy efficient architectures.

Víctor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Thread to strand binding of parallel network applications in massive multi-threaded systems.

Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

Adapting cache partitioning algorithms to pseudo-LRU replacement policies.

Kamil Kedzierski, Miquel Moretó, Francisco J. Cazorla, Mateo Valero

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Power and performance aware reconfigurable cache for CMPs.

Kamil Kedzierski, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero

Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010

Load balancing using dynamic cache allocation.

Miquel Moretó, Francisco J. Cazorla, Rizos Sakellariou, Mateo Valero

Proceedings of the 7th Conference on Computing Frontiers, 2010

Power and thermal characterization of POWER6 system.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

FlexDCP: a QoS framework for CMP architectures.

Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Rizos Sakellariou, Mateo Valero

ACM SIGOPS Oper. Syst. Rev., 2009

An Analyzable Memory Controller for Hard Real-Time CMPs.

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero

IEEE Embed. Syst. Lett., 2009

CPU Accounting in CMP Processors.

Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero

IEEE Comput. Archit. Lett., 2009

Thread to Core Assignment in SMT On-Chip Multiprocessors.

Carmelo Acosta, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

Proceedings of the 21st International Symposium on Computer Architecture and High Performance Computing, 2009

Characterizing the resource-sharing levels in the UltraSPARC T2 processor.

Vladimir Cakarevic, Petar Radojkovic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Hardware support for WCET analysis of hard real-time multicore systems.

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Guillem Bernat, Mateo Valero

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

Using Randomized Caches in Probabilistic Real-Time Systems.

Eduardo Quiñones, Emery D. Berger, Guillem Bernat, Francisco J. Cazorla

Proceedings of the 21st Euromicro Conference on Real-Time Systems, 2009

ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs.

Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero

Proceedings of the PACT 2009, 2009

2008

Multicore Resource Management.

Kyle J. Nesbit, Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero, James E. Smith

IEEE Micro, 2008

A dynamic scheduler for balancing HPC applications.

Carlos Boneti, Roberto Gioiosa, Francisco J. Cazorla, Mateo Valero

Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

Measuring Operating System Overhead on CMT Processors.

Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alejandro Pajuelo, Roberto Gioiosa, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

Selection of the Register File Size and the Resource Allocation Policy on SMT Processors.

Jesús Alastruey, Teresa Monreal, Francisco J. Cazorla, Víctor Viñals, Mateo Valero

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

A Two-Level Load/Store Queue Based on Execution Locality.

Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Software-Controlled Priority Characterization of POWER5 Processor.

Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Balancing HPC applications through smart allocation of resources in MT processors.

Carlos Boneti, Roberto Gioiosa, Francisco J. Cazorla, Julita Corbalán, Jesús Labarta, Mateo Valero

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

MFLUSH: Handling Long-Latency Loads in SMT On-Chip Multiprocessors.

Carmelo Acosta, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

Proceedings of the 2008 International Conference on Parallel Processing, 2008

MLP-Aware Dynamic Cache Partitioning.

Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

Proceedings of the High Performance Embedded Architectures and Compilers, 2008

Architecture Performance Prediction Using Evolutionary Artificial Neural Networks.

Pedro A. Castillo, Antonio Miguel Mora, Juan Julián Merelo Guervós, Juan Luis Jiménez Laredo, Miquel Moretó, Francisco J. Cazorla, Mateo Valero, Sally A. McKee

Proceedings of the Applications of Evolutionary Computing, 2008

Evolutionary system for prediction and optimization of hardware architecture performance.

Pedro Ángel Castillo Valdivieso, Juan Julián Merelo Guervós, Miquel Moretó, Francisco J. Cazorla, Mateo Valero, Antonio Miguel Mora, Juan Luis Jiménez Laredo, Sally A. McKee

Proceedings of the IEEE Congress on Evolutionary Computation, 2008

Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation.

Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero

Proceedings of the Architecture of Computing Systems, 2008

2007

Explaining Dynamic Cache Partitioning Speed Ups.

Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

IEEE Comput. Archit. Lett., 2007

Online Prediction of Applications Cache Utility.

Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

On the Problem of Minimizing Workload Execution Time in SMT Processors.

Francisco J. Cazorla, Enrique Fernández, Peter M. W. Knijnenburg, Alex Ramírez, Rizos Sakellariou, Mateo Valero

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

FAME: FAirly MEasuring Multithreaded Architectures.

Javier Vera, Francisco J. Cazorla, Alex Pajuelo, Oliverio J. Santana, Enrique Fernández, Mateo Valero

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

A Flexible Heterogeneous Multi-Core Architecture.

Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Daniel A. Jiménez, Mateo Valero

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006

Predictable Performance in SMT Processors: Synergy between the OS and SMTs.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

IEEE Trans. Computers, 2006

2005

Kilo-Instruction Processors: Overcoming the Memory Wall.

Adrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero

IEEE Micro, 2005

Architectural support for real-time task scheduling in SMT processors.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the 2005 International Conference on Compilers, 2005

2004

QoS for High-Performance SMT Processors in Embedded Systems.

Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández

IEEE Micro, 2004

Optimising long-latency-load-aware fetch policies for SMT processors.

Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández

Int. J. High Perform. Comput. Netw., 2004

Dynamically Controlled Resource Allocation in SMT Processors.

Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

DCache Warn: An I-Fetch Policy to Increase SMT Efficiency.

Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Enabling SMT for real-time embedded systems.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the 2004 12th European Signal Processing Conference, 2004

Feasibility of QoS for SMT.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the Euro-Par 2004 Parallel Processing, 2004

Implicit vs. Explicit Resource Allocation in SMT Processors.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

Predictable performance in SMT processors.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the First Conference on Computing Frontiers, 2004

2003

Improving Memory Latency Aware Fetch Policies for SMT Processors.

Francisco J. Cazorla, Enrique Fernández, Alex Ramírez, Mateo Valero

Proceedings of the High Performance Computing, 5th International Symposium, 2003