Francesco Stefanni

Proceedings of the IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2017

Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction.

[BibT_eX]

[DOI]

Proceedings of the Languages, Design Methods, and Tools for Electronic System Design, 2017

Automatic Integration of HDL IPs in Simulink Using FMI and S-Function Interfaces.

[BibT_eX]

[DOI]

Proceedings of the Languages, Design Methods, and Tools for Electronic System Design, 2017

Automatic generation of cycle-accurate Simulink blocks from hdl ips.

[BibT_eX]

[DOI]

Proceedings of the 2017 Forum on Specification and Design Languages, 2017

2016

Automatic generation of self-adaptive transactors from PSL assertions.

[BibT_eX]

[DOI]

Florenc Demrozi

Graziano Pravadelli

Mirella Negro Marcigaglia

Proceedings of the 2016 Forum on Specification and Design Languages, 2016

2015

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection.

[BibT_eX]

[DOI]

Sensors, 2015

Reusing RTL Assertion Checkers for Verification of SystemC TLM Models.

[BibT_eX]

[DOI]

J. Electron. Test., 2015

RTL property abstraction for TLM assertion-based verification.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

On the reuse of RTL assertions in SystemC TLM verification.

[BibT_eX]

[DOI]

Mirella Negro Marcigaglia

Proceedings of the 15th Latin American Test Workshop, 2014

Moving from co-simulation to simulation for effective smart systems design.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Automatic Network Protocol Synthesis from UML Sequence Diagrams.

[BibT_eX]

[DOI]

Emad Samuel Malki Ebeid

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

Code generation alternatives to reduce heterogeneous embedded systems to homogeneity.

[BibT_eX]

[DOI]

Proceedings of the 2013 Forum on specification and Design Languages, 2013

SMAC: Smart Systems Co-design.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels.

[BibT_eX]

[DOI]

Des. Autom. Embed. Syst., 2012

A formal support for homogeneous simulation of heterogeneous embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems, 2012

SystemC Model Generation for Realistic Simulation of Networked Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Refinement of UML/MARTE models for the design of networked embedded systems.

[BibT_eX]

[DOI]

Emad Samuel Malki Ebeid

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

A design and veri?cation methodology for networked embedded systems.

[BibT_eX]

[DOI]

PhD thesis, 2011

Communication-aware middleware-based design-space exploration for Networked Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

Communication-aware design flow for dependable networked embedded systems.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

UNIVERCM: The UNIversal VERsatile computational model for heterogeneous embedded system design.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

Efficient implementation and abstraction of systemc data types for fast simulation.

[BibT_eX]

[DOI]

Proceedings of the 2011 Forum on Specification & Design Languages, 2011

2010

HIFSuite: Tools for HDL Code Conversion and Manipulation.

[BibT_eX]

[DOI]

Nicola Bombieri

Giuseppe Di Guglielmo

Alessandro Venturelli

EURASIP J. Embed. Syst., 2010

HIFSuite: Tools for HDL code conversion and manipulation.

[BibT_eX]

[DOI]

Nicola Bombieri

Giuseppe Di Guglielmo

Alessandro Venturelli

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Modeling of Communication Infrastructure for Design-Space Exploration.

[BibT_eX]

Proceedings of the 2010 Forum on specification & Design Languages, 2010

2009

Time-Varying Network Fault Model for the Design of Dependable Networked Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

The role of parallel simulation in functional verification.

[BibT_eX]

[DOI]

Giuseppe Di Guglielmo

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

SystemC Simulation of Networked Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Languages for Embedded Systems and their Applications, 2008

A SystemC-based Framework for Modeling and Simulation of Networked Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2008

Network Fault Model for Dependability Assessment of Networked Embedded Systems.

[BibT_eX]

[DOI]