Francesco Lorenzelli
Orcid: 0000-0001-6465-7157
According to our database1,
Francesco Lorenzelli
authored at least 8 papers
between 2021 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
2021
2022
2023
2024
2025
0
1
2
3
4
5
6
1
1
5
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2025
2024
Proceedings of the IEEE European Test Symposium, 2024
2023
Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Wafer-Scale Electrical Characterization of Silicon Quantum Dots from Room to Low Temperatures.
Proceedings of the IEEE International Test Conference, 2023
Generating Test Patterns for Chiplet Interconnects: Achieving Optimal Effectiveness and Efficiency.
Proceedings of the IEEE International Test Conference in Asia, 2023
Study of Transistor Metrics for Room-Temperature Screening of Single Electron Transistors for Silicon Spin Qubit Applications.
Proceedings of the IEEE European Test Symposium, 2023
Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages.
Proceedings of the IEEE International 3D Systems Integration Conference, 2023
2021
Speeding up Cell-Aware Library Characterization by Preceding Simulation with Structural Analysis.
Proceedings of the 26th IEEE European Test Symposium, 2021