Francesco Falaschi
Orcid: 0000-0001-6996-7285
According to our database1,
Francesco Falaschi
authored at least 10 papers
between 2015 and 2024.
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Bibliography
2024
Video clips for patient comprehension of atrial fibrillation and deep vein thrombosis in emergency care. A randomised clinical trial.
npj Digit. Medicine, 2024
2023
Highly-Efficient Galois Counter Mode Symmetric Encryption Core for the Space Data Link Security Protocol.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Secure Data Authentication in Space Communications by High-Efficient AES-CMAC Core in Space-Grade FPGA.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
2021
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative.
Microprocess. Microsystems, November, 2021
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2021
2020
Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm.
Sensors, 2020
A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) Implementation.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
2019
Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
2015
Proceedings of the 2nd IEEE World Forum on Internet of Things, 2015
A hardware accelerator for the IEEE 802.1X-2010 key hierarchy in automotive applications.
Proceedings of the 12th IEEE/ACS International Conference of Computer Systems and Applications, 2015