Francesco Conzatti

According to our database1, Francesco Conzatti authored at least 11 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
A 470μW, 102.6dB-DR, 20kHz BW Calibration-Free ΔΣ Modulator with SFDR in Excess of 110dBc using an Intrinsically Linear 13-Level DAC.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
An Intrinsically Linear 13-Level Capacitive DAC for Delta Sigma Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2023

A SAR-assisted Incremental $\Sigma\Delta$ ADC with Accumulation-based S/H Circuit for Shunt Current Measurements.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

On the Intrinsic Linearity Limitations of Single-Bit Delta Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Thermal Noise Analysis of Accumulation-based S/H Circuit for Shunt Current Sensing.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2021
A 3.2-MS/s 14-Bit Extended-Range Second-Order Incremental ADC.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

A Dual-Mode Second-Order Oversampling Analog-to-Digital Converter.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
Analysis of Operational Amplifier Requirements for Extended-Range Second-Order Incremental ADCs.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2017
A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFET.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2012
Numerical simulation of advanced CMOS and beyond CMOS devices.
PhD thesis, 2012

A Multi-Subband Monte Carlo study of electron transport in strained SiGe n-type FinFETs.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012


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