Francesco A. Amoroso

According to our database, Francesco A. Amoroso authored at least 13 papers between 2008 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier.

Luca Magnelli, Francesco A. Amoroso, Felice Crupi, Gregorio Cappuccino, Giuseppe Iannaccone

Int. J. Circuit Theory Appl., 2014

2012

A new efficient SC integrator scheme for high-speed low-power applications.

Francesco A. Amoroso, Andrea Pugliese, Gregorio Cappuccino

Int. J. Circuit Theory Appl., 2012

Design approach for high-bandwidth low-power three-stage operational amplifiers.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

Int. J. Circuit Theory Appl., 2012

Special session: IEEE Real World Engineering Projects: Discovery-based curriculum modules for first-year students.

Stephen Williams, Anita N. Vasavada, Jacques Nicolas Beneat, Gregorio Cappuccino, David C. Lin, Warren A. Rosen, M. Eric Carr, Kirk Reinkens, Mingrui Zhang, Francesco A. Amoroso

Proceedings of the IEEE Frontiers in Education Conference, 2012

2011

Design criterion for high-speed low-power SC circuits.

Francesco A. Amoroso, Andrea Pugliese, Gregorio Cappuccino

Int. J. Circuit Theory Appl., 2011

2010

Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" [Dec 09 2569-2582].

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Analysis of op-amp phase margin impact on SC SigmaDelta modulator performance.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

Microelectron. J., 2010

2009

Settling Time Optimization for Three-Stage CMOS Amplifier Topologies.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Class-AB output stage design for high-speed three-stage op-amps.

Gregorio Cappuccino, Francesco A. Amoroso, Andrea Pugliese

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Design considerations for fast-settling two-stage Miller-compensated operational amplifiers.

Francesco A. Amoroso, Andrea Pugliese, Gregorio Cappuccino

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers.

Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008