Francesca Palumbo

Maxime Pelcat

ACM Trans. Model. Perform. Evaluation Comput. Syst., 2021

A Composable Monitoring System for Heterogeneous Embedded Platforms.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2021

In-Field Automatic Detection of Grape Bunches under a Totally Uncontrolled Environment.

[BibT_eX]

[DOI]

Sensors, 2021

The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2021

Reconfigurable and approximate computing for video coding.

[BibT_eX]

[DOI]

CoRR, 2021

Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI.

[BibT_eX]

[DOI]

CoRR, 2021

PathTracing: Raising the Level of Understanding of Processing Latency in Heterogeneous MPSoCs.

[BibT_eX]

[DOI]

Claudio Rubattu

Maxime Pelcat

Proceedings of the DroneSE and RAPIDO '21: Methods and Tools, 2021

Unmanned Vehicles in Smart Farming: a Survey and a Glance at Future Horizons.

[BibT_eX]

[DOI]

Proceedings of the DroneSE and RAPIDO '21: Methods and Tools, 2021

2020

NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning.

[BibT_eX]

[DOI]

Yehya Nasser

Jean-Christophe Prévotet

ACM Trans. Design Autom. Electr. Syst., 2020

Feasibility Study and Porting of the Damped Least Square Algorithm on FPGA.

[BibT_eX]

[DOI]

IEEE Access, 2020

Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

Editorial: Special Issue on Computing Frontiers.

[BibT_eX]

[DOI]

Michela Becchi

J. Signal Process. Syst., 2019

Preface to the Special Issue on Methods, Tools, and Architectures for Signal and Image Processing.

[BibT_eX]

[DOI]

João Canas Ferreira

J. Signal Process. Syst., 2019

An integrated hardware/software design methodology for signal processing systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2019

Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2019

Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding.

[BibT_eX]

[DOI]

IEEE Access, 2019

Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach.

[BibT_eX]

[DOI]

Pablo Sanchez de Rojas

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Elicitation of technical requirements in large research projects: the CERBERO approach.

[BibT_eX]

[DOI]

Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

A Dataflow Implementation of Inverse Kinematics on Reconfigurable Heterogeneous MPSoC.

[BibT_eX]

[DOI]

Proceedings of the Cyber-Physical Systems PhD Workshop 2019, an event held within the CPS Summer School "Designing Cyber-Physical Systems, 2019

CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF.

[BibT_eX]

[DOI]

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

NeuPow: artificial neural networks for power and behavioral modeling of arithmetic components in 45nm ASICs technology.

[BibT_eX]

[DOI]

Yehya Nasser

Jean-Christophe Prévotet

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

Optimization and deployment of CNNs at the edge: the ALOHA experience.

[BibT_eX]

[DOI]

Ilias Theodorakopoulos

Michael Masin

Marcos Martinez de Alejandro

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems.

[BibT_eX]

[DOI]

Maria Katiuscia Zedda

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018

Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Architecture-aware design and implementation of CNN algorithms for embedded inference: the ALOHA project.

[BibT_eX]

[DOI]

Ilias Theodorakopoulos

Proceedings of the 30th International Conference on Microelectronics, 2018

ALOHA: an architectural-aware framework for deep learning at the edge.

[BibT_eX]

[DOI]

Ilias Theodorakopoulos

Michael Masin

Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018

2017

Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2017

Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs.

[BibT_eX]

[DOI]

J. Syst. Archit., 2017

Hardware design methodology using lightweight dataflow and its integration with low power techniques.

[BibT_eX]

[DOI]

J. Syst. Archit., 2017

Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2017

Exploring the performance of partially reconfigurable point-to-point interconnects.

[BibT_eX]

[DOI]

Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Adaptive software-augmented hardware reconfiguration with dataflow design automation.

[BibT_eX]

[DOI]

Claudio Rubattu

Maxime Pelcat

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Feasibility Study of Real-Time Spiking Neural Network Simulations on a Swarm Intelligence Based Digital Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Cross-layer design of reconfigurable cyber-physical systems.

[BibT_eX]

[DOI]

Michael Masin

Hans Myrhaug

J. A. de Oliveira Filho

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Challenging CPS Trade-off Adaptivity with Coarse-Grained Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2017

2016

Automated Design Flow for Multi-Functional Dataflow-Based Platforms.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2016

Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2016

On-the-fly adaptivity for process networks over shared-memory platforms.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures.

[BibT_eX]

[DOI]

J. Electr. Comput. Eng., 2016

Dataflow-Based Design of Coarse-Grained Reconfigurable Platforms.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Demo: Reconfigurable Platform Composer Tool.

[BibT_eX]

[DOI]

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Session 2: Architectures for image processing.

[BibT_eX]

[DOI]

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Low power design methodology for signal processing systems using lightweight dataflow techniques.

[BibT_eX]

[DOI]

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Power and clock gating modelling in coarse grained reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

Adaptable AES implementation with power-gating support.

[BibT_eX]

[DOI]

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015

Computing Swarms for Self-Adaptiveness and Self-Organization in Floating-Point Array Processing.

[BibT_eX]

[DOI]

ACM Trans. Auton. Adapt. Syst., 2015

Coarse-grained reconfiguration: dataflow-based power management.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2015

Reconfigurable coprocessors synthesis in the MPEG-RVC domain.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Power modelling for saving strategies in coarse grained reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Exploring custom heterogeneous MPSoCs for real-time neural signal decoding.

[BibT_eX]

[DOI]

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

Automated power gating methodology for dataflow-based reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014

The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2014

Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategy.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case.

[BibT_eX]

[DOI]

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Automatic generation of dataflow-based reconfigurable co-processing units.

[BibT_eX]

[DOI]

Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013

DSE and profiling of multi-context coarse-grained reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

Session 2: Tools for DSP algorithm implementation.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

A coarse-grained reconfigurable wavelet denoiser exploiting the Multi-Dataflow Composer tool.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012

Multi-purpose systems: A novel dataflow-based generation and mapping strategy.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A nature-inspired adaptive floating-point coprocessing system.

[BibT_eX]

[DOI]

Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Concurrent hybrid switching for massively parallel systems-on-chip: the CYBER architecture.

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, CF'12, 2012

2011

The Multi-Dataflow Composer tool: A runtime reconfigurable HDL platform composer.

[BibT_eX]

[DOI]

Nicola Carta

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Towards self-adaptive networks on chip for massively parallel processors: multilevel quality of service programmability.

[BibT_eX]

[DOI]

Proceedings of the 8th Conference on Computing Frontiers, 2011

2010

A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations.

[BibT_eX]

[DOI]

Danilo Pani

Int. J. High Perform. Syst. Archit., 2010

Impact of Half-Duplex and Full-Duplex DMA Implementations on NoC Performance.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2010, 2010

RVC: A multi-decoder CAL Composer tool.

[BibT_eX]

[DOI]

Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

2008

A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2008

A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

A Surface Tension and Coalescence Model for Dynamic Distributed Resources Allocation in Massively Parallel Processors on-Chip.

[BibT_eX]

[DOI]

Proceedings of the Nature Inspired Cooperative Strategies for Optimization (NICSO 2007), 2007

2006

Quantum Correlations in a Generalized Spin Star System.

[BibT_eX]

[DOI]