Fran Cardells
Orcid: 0000-0002-4757-9510Affiliations:
- Hewlett-Packard R&D Lab, Barcelona, Spain
- Autonomous University of Madrid, Spain
- Polytechnic University of Valencia, Department of Electronic Engineering, Spain
According to our database1,
Fran Cardells
authored at least 13 papers
between 2002 and 2006.
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Bibliography
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004
2003
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2003
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002