Fran Cardells

Orcid: 0000-0002-4757-9510

Affiliations:
  • Hewlett-Packard R&D Lab, Barcelona, Spain
  • Autonomous University of Madrid, Spain
  • Polytechnic University of Valencia, Department of Electronic Engineering, Spain


According to our database1, Fran Cardells authored at least 13 papers between 2002 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2006
Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
Area-Efficient 2-D Shift-Variant Convolvers for FPGA-based Digital Image Processing.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA.
Proceedings of the Field Programmable Logic and Application, 2004

Power analysis and estimation tool integrated with XPOWER.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Symbol Timing Synchronization in FPGA-Based Software Radios: Application to DVB-S.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Optimized FPGA-implementation of quadrature DDS.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard.
Proceedings of the Field-Programmable Logic and Applications, 2002

High Performance Quadrature Digital Mixers for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002


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