Florian Cacho

According to our database1, Florian Cacho authored at least 50 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Non-conducting Hot carrier temperature activation and temperature sense effect.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

A Methodology to Address RF Aging of 40nm CMOS PA Cells Under 5G mmW Modulation Profiles.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

Robustness Assessment Through 77GHz Operating Life Test of Power Amplifier for Radar Applications in 28nm FD-SOI CMOS.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
Integrated Test Circuit for Off-State Dynamic Drain Stress Evaluation.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Location of Oxide Breakdown Events under Off-state TDDB in 28nm N-MOSFETs dedicated to RF applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Minimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

2022
Design-Time Exploration for Process, Environment and Aging Compensation Techniques for Low Power Reliable-Aware Design.
IEEE Trans. Emerg. Top. Comput., 2022

40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

Comprehensive Analysis of RF Hot-Carrier Reliability Sensitivity and Design Explorations for 28GHz Power Amplifier Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

New Modelling Off-state TDDB for 130nm to 28nm CMOS nodes.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Frequency dependant gate oxide TDDB model.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
BTI Arbitrary Stress Patterns Characterization & Machine-Learning optimized CET Maps Simulations.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Analysis of the interactions of HCD under "On" and "Off" state modes for 28nm FDSOI AC RF modelling.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

HCI Temperature sense effect from 180nm to 28nm nodes.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Monitoring Setup and Hold Timing Limits.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
Comparison of variability of HCI induced drift for SiON and HKMG devices.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Hot-Carrier induced Breakdown events from Off to On mode in NEDMOS.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Impact of Passive & Active Load Gate Impedance on Breakdown Hardness in 28nm FDSOI Technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Investigation of NBTI Dynamic Behavior with Ultra-Fast Measurement.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Global and Local Process Variation Simulations in Design for Reliability approach.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

2018
Investigation of speed sensors accuracy for process and aging compensation.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Reliability assessment of 4GSP/s interleaved SAR ADC.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Integrated Test Structures for Reliability Investigation under Dynamic Stimuli.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Characterization of Low Drop-Out during ageing and design for yield.
Microelectron. Reliab., 2017

Enabling robust automotive electronic components in advanced CMOS nodes.
Microelectron. Reliab., 2017

Cognitive approach to support dynamic aging compensation.
Proceedings of the IEEE International Test Conference, 2017

Dynamic aging compensation and Safety measures in Automotive environment.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Investigation of critical path selection for in-situ monitors insertion.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

High-yield design of high-density SRAM for low-voltage and low-leakage operations.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

Workload dependent reliability timing analysis flow.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Performance vs. reliability adaptive body bias scheme in 28 nm & 14 nm UTBB FDSOI nodes.
Microelectron. Reliab., 2016

Potentiality of healing techniques in hot-carrier damaged 28 nm FDSOI CMOS nodes.
Microelectron. Reliab., 2016

Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

In-situ slack monitors: taking up the challenge of on-die monitoring of variability and reliability.
Proceedings of the 1st IEEE International Verification and Security Workshop, 2016

Activity profiling: Review of different solutions to develop reliable and performant design.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

Study of workload impact on BTI HCI induced aging of digital circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Early failure prediction by using in-situ monitors: Implementation and application results.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

2015
Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

28nm UTBB FDSOI product reliability/performance trade-off optimization through body bias operation.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

From BTI variability to product failure rate: A technology scaling perspective.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Timing in-situ monitors: Implementation strategy and applications results.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2012
Reliability Characterization and Modeling Solution to Predict Aging of 40-nm MOSFET DC and RF Performances Induced by RF Stresses.
IEEE J. Solid State Circuits, 2012

2011
A bottom-up approach for System-On-Chip reliability.
Microelectron. Reliab., 2011

Bottom-up digital system-level reliability modeling.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2007
A constitutive single crystal model for the silicon mechanical behavior: Applications to the stress induced by silicided lines and STI in MOS technologies.
Microelectron. Reliab., 2007


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