Florence Azaïs
According to our database1,
Florence Azaïs
authored at least 135 papers
between 1995 and 2024.
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Bibliography
2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Low-Resource Fully-Digital BPSK Demodulation Technique for Intra-Body Wireless Sensor Networks.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2024
Digital Generation of RF Phase-Modulated Test Stimuli: Application to BPSK Modulation Scheme.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024
2023
On the Use of the Indirect Test Strategy for Lifetime Performance Monitoring of RF Circuits.
J. Electron. Test., April, 2023
Low-cost digital solution for production test of ZigBee transmitters Special Session "AMS-RF testing".
Proceedings of the 24th IEEE Latin American Test Symposium, 2023
2022
Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
J. Electron. Test., 2021
Proceedings of the 22nd IEEE Latin American Test Symposium, 2021
Exploration of a digital-based solution for the generation of 2.4GHz OQPSK test stimuli.
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Investigations on the Use of Ensemble Methods for Specification-Oriented Indirect Test of RF Circuits.
J. Electron. Test., 2020
Implementing indirect test of RF circuits without compromising test quality: a practical case study.
Proceedings of the IEEE Latin-American Test Symposium, 2020
Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs.
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
Analytical Models for the Evaluation of Resistive Short Defect Detectability in Presence of Process Variations: Application to 28nm Bulk and FDSOI Technologies.
J. Electron. Test., 2019
Proceedings of the 16th International Conference on Synthesis, 2019
Proceedings of the IEEE Latin American Test Symposium, 2019
Power Measurement and Spectral Test of ZigBee Transmitters from 1-bit Under-sampled Acquisition.
Proceedings of the 24th IEEE European Test Symposium, 2019
2018
On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints.
J. Electron. Test., 2018
Impact of process variations on the detectability of resistive short defects: Comparative analysis between 28nm Bulk and FDSOI technologies.
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
2017
J. Electron. Test., 2017
Comprehensive Study for Detection of Weak Resistive Open and Short Defects in FDSOI Technology.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions.
Proceedings of the 22nd IEEE European Test Symposium, 2017
2016
Digital Embedded Test Instrument for On-Chip Phase Noise Testing of Analog/RF Integrated Circuits.
J. Circuits Syst. Comput., 2016
J. Electron. Test., 2016
Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect.
Proceedings of the 17th Latin-American Test Symposium, 2016
Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI - LVT and RVT Configurations.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
2015
Efficiency evaluation of analog/RF alternate test: Comparative study of indirect measurement selection strategies.
Microelectron. J., 2015
Phase Noise Testing of Analog/IF Signals Using Digital ATE: A New Post-Processing Algorithm for Extended Measurement Range.
J. Electron. Test., 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 16th Latin-American Test Symposium, 2015
A Framework for Efficient Implementation of Analog/RF Alternate Test with Model Redundancy.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
A new technique for low-cost phase noise production testing from 1-bit signal acquisition.
Proceedings of the 20th IEEE European Test Symposium, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015
2014
Enhancing confidence in indirect analog/RF testing against the lack of correlation between regular parameters and indirect measurements.
Microelectron. J., 2014
it Inf. Technol., 2014
Study of Low-Cost Electrical Test Strategies for Post-Silicon Yield Improvement of MEMS Convective Accelerometers.
J. Electron. Test., 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing.
Proceedings of the 15th Latin American Test Workshop, 2014
Proceedings of the 2014 International Test Conference, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
New implementions of predictive alternate analog/RF test with augmented model redundancy.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC.
Microelectron. J., 2013
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays.
Proceedings of the 14th Latin American Test Workshop, 2013
Implementing model redundancy in predictive alternate test to improve test confidence.
Proceedings of the 18th IEEE European Test Symposium, 2013
Proceedings of the 22nd Asian Test Symposium, 2013
2012
Proceedings of the 30th IEEE VLSI Test Symposium, 2012
Low-cost SNR estimation of analog signals using standard digital automated test equipment (ATE).
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Design-for-manufacturability of MEMS convective accelerometers through adaptive electrical calibration strategy.
Proceedings of the 13th Latin American Test Workshop, 2012
Making predictive analog/RF alternate test strategy independent of training set size.
Proceedings of the 2012 IEEE International Test Conference, 2012
2011
A Behavioral Model of MEMS Convective Accelerometers for the Evaluation of Design and Calibration Strategies at System Level.
J. Electron. Test., 2011
A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources.
J. Electron. Test., 2011
J. Electron. Test., 2011
Test and calibration of MEMS convective accelerometers with a fully electrical setup.
Proceedings of the 12th Latin American Test Workshop, 2011
An electrical test method for MEMS convective accelerometers: Development and evaluation.
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Study of an Electrical Setup for Capacitive MEMS Accelerometers Test and Calibration.
J. Electron. Test., 2010
Experiments on the analysis of phase/frequency-modulated RF signals using digital tester channels.
Proceedings of the 11th Latin American Test Workshop, 2010
Proceedings of the 15th European Test Symposium, 2010
2009
Characterization of the transient behavior of gated/STI diodes and their associated BJT in the CDM time domain.
Microelectron. Reliab., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009
Exploiting Zero-Crossing for the Analysis of FM Modulated Analog/RF Signals Using Digital ATE.
Proceedings of the Eighteentgh Asian Test Symposium, 2009
2008
VLSI Design, 2008
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008
A novel method for test and calibration of capacitive accelerometers with a fully electrical setup.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008
2007
IET Comput. Digit. Tech., 2007
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC.
Proceedings of the 12th European Test Symposium, 2007
Impact of Simultaneous Switching Noise on the Static behavior of Digital CMOS Circuits.
Proceedings of the 16th Asian Test Symposium, 2007
2006
Microelectron. Reliab., 2006
J. Electron. Test., 2006
IEEE Des. Test Comput., 2006
2005
Microelectron. Reliab., 2005
Microelectron. J., 2005
J. Electron. Test., 2005
J. Electron. Test., 2005
J. Electron. Test., 2005
Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the 10th European Test Symposium, 2005
2004
Microelectron. Reliab., 2004
J. Electron. Test., 2004
Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure.
J. Electron. Test., 2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 9th European Test Symposium, 2004
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
Microelectron. J., 2003
J. Electron. Test., 2003
J. Electron. Test., 2003
IEEE Des. Test Comput., 2003
IEEE Des. Test Comput., 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003
2002
Estimating Static Parameters of A-to-D Converters from Spectral Analysis.
Proceedings of the 3rd Latin American Test Workshop, 2002
Proceedings of the 7th European Test Workshop, 2002
Proceedings of the 7th European Test Workshop, 2002
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
J. Electron. Test., 2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Electrical Analysis of Gate Oxide Short in MOS Technologies.
Proceedings of the 2nd Latin American Test Workshop, 2001
On-Chip Generation of High-Quality Ramp Stimulus With Minimal Silicon Area.
Proceedings of the 2nd Latin American Test Workshop, 2001
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001
On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST.
Proceedings of the SOC Design Methodologies, 2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
J. Electron. Test., 2000
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
On the Temperature Dependencies of Analog BIST.
Proceedings of the 1st Latin American Test Workshop, 2000
Minimizing the Hardware Overhead of a Histogram-Based BIST Scheme for Analog-to-Digital Converters.
Proceedings of the 1st Latin American Test Workshop, 2000
Proceedings of the 5th European Test Workshop, 2000
Proceedings of the 2000 Design, 2000
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000
1999
J. Electron. Test., 1999
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
Proceedings of the 4th European Test Workshop, 1999
1998
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits.
Proceedings of the 1998 Design, 1998
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998
A Methodology and Design for Effective Testing of Voltage-Controlled Oscillators (VCOs.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998
1997
Proceedings of the European Design and Test Conference, 1997
1996
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996
1995
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995