Flavio Rampogna

According to our database, Flavio Rampogna authored at least 4 papers between 1996 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core.

Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc-Nicolas Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet

IEEE J. Solid State Circuits, 2009

2008

Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core.

Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet

Proceedings of the ESSCIRC 2008, 2008

1997

Low-power design of 8-b embedded CoolRisc microcontroller cores.

Christian Piguet, Jean-Marc Masgonty, Claude Arm, Serge Durand, Thierry Schneider, Flavio Rampogna, Ciro Scarnera, Christian Iseli, Jean-Paul Bardyn, R. Pache, Evert Dijkstra

IEEE J. Solid State Circuits, 1997

1996

A platform for co-design and co-synthesis based on FPGA.

Emeka Mosanya, Jean-Yves Perrier, Maxime Goeke, Flavio Rampogna, Julien Linder, Eduardo Sanchez

Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996