Flavio Carbognani

According to our database, Flavio Carbognani authored at least 13 papers between 2002 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Cross-over current suppressing latch compared to state-of-the-art for low-power low-frequency applications with resonant clocking.

Flavio Carbognani, Luca Henzen

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

VLSI Implementations of the Cryptographic Hash Functions MD6 and ïrRUPT.

Luca Henzen, Flavio Carbognani, Jean-Philippe Aumasson, Sean O'Neil, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT.

Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

IEEE Trans. Very Large Scale Integr. Syst., 2008

FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM.

Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

A transform, lighting and setup ASIC for surface splatting.

Simon Heinzle, Olivier Saurer, Sebastian Axmann, Diego Browarnik, Andreas Schmidt, Flavio Carbognani, Peter Luethi, Norbert Felber, Markus H. Gross

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication.

Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

42% power savings through glitch-reducing clocking strategy in a hearing aid application.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Two-phase resonant clocking for ultra-low-power hearing aid applications.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.

Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 43rd Design Automation Conference, 2006

2005

Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the Integrated Circuit and System Design, 2005

A 0.67-mm² 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids.

Flavio Carbognani, Felix Bürgin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2002

A Novel Thermomechanics -Based Lifetime Prediction Model for Cycle Fatigue Failure Mechanisms in Power Semiconductors.

Mauro Ciappa, Flavio Carbognani, Paolo Cova, Wolfgang Fichtner

Microelectron. Reliab., 2002