Firat Celik

Orcid: 0000-0001-9587-2204

According to our database1, Firat Celik authored at least 9 papers between 2018 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI.
IEEE Trans. Very Large Scale Integr. Syst., 2021

An 8-Bit 800 MS/s Loop-Unrolled SAR ADC With Common-Mode Adaptive Background Offset Calibration in 28 nm FDSOI.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 32 Gb/s PAM-16 TX and ADC-Based RX AFE with 2-tap embedded analog FFE in 28 nm FDSOI.
Microelectron. J., 2021

2020
A Low-Power 9-Bit 222 MS/s Asynchronous SAR ADC in 65 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Analog Neural Networks With Deep-Submicrometer Nonlinear Synapses.
IEEE Micro, 2019

JESD204B Compliant 12.5 Gb/s LVDS and SST Transmitters in 28 nm FD-SOI CMOS.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

Self-Calibrated Delay-Based LSB Extraction for Resolution Improvement in SAR ADCs.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

ISI Sensitivity of PAM Signaling for Very High-Speed Short-Reach Copper Links.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

2018
A 10b SAR ADC with Widely Scalable Sampling Rate and AGC Amplifier Front-End.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018


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