Filipe Salgado

Orcid: 0000-0001-8380-8408

Affiliations:
  • University of Minho, Braga, Portugal


According to our database1, Filipe Salgado authored at least 21 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2019
DBTOR: A Dynamic Binary Translation Architecture for Modern Embedded Systems.
Proceedings of the IEEE International Conference on Industrial Technology, 2019

Non-Intrusive Hardware Acceleration for Dynamic Binary Translation in Embedded Systems.
Proceedings of the IEEE International Conference on Industrial Technology, 2019

2018
A 6LoWPAN Accelerator for Internet of Things Endpoint Devices.
IEEE Internet Things J., 2018

A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems.
Proceedings of the 23rd IEEE International Conference on Emerging Technologies and Factory Automation, 2018

2017
FAT-DBT engine (framework for application-tailorcd, co-designcd dynamic binary translation enginc)
PhD thesis, 2017

Condition Codes Evaluation on Dynamic Binary Translation for Embedded Platforms.
IEEE Embed. Syst. Lett., 2017

MODELA DBT: Model-driven elaboration language applied to Dynamic Binary Translation.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

2016
Hybrid real-time operating systems: deployment of critical FreeRTOS features on FPGA.
Int. J. Embed. Syst., 2016

Towards an FPGA-based network layer filter for the Internet of Things edge devices.
Proceedings of the 21st IEEE International Conference on Emerging Technologies and Factory Automation, 2016

2015
Task-Aware Interrupt Controller: Priority Space Unification in Real-Time Systems.
IEEE Embed. Syst. Lett., 2015

Characterization of FPGA-master ARM communication delays in Cyclone V devices.
Proceedings of the IECON 2015, 2015

2014
Towards hardware embedded virtualization technology: architectural enhancements to an ARM SoC.
SIGBED Rev., 2014

2013
Hardware-software extensions to a softcore processor for FPGA-based adaptive PID control.
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

Generative component-based IP camera design.
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

2012
RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design.
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012

Exploring metrics tradeoffs in a multithreading extensible processor.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

A PID controller module tightly-coupled on a processor datapath.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

Multi-Camera Home Appliance Network: Handling device interoperability.
Proceedings of the IEEE 10th International Conference on Industrial Informatics, 2012

Shifting SOA to MPSoC: An exploratory example of application.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

Reliability correlation between physical and virtual cores at the ISA level.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

A Fault Tolerant Design Methodology for a FPGA-Based Softcore Processor.
Proceedings of the 1st Conference on Embedded Systems, 2012


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