Filip Demarsin
According to our database1,
Filip Demarsin
authored at least 2 papers
between 2012 and 2013.
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Bibliography
2013
A 14b 2.5GS/s 8-way-interleaved pipelined ADC with background calibration and digital dynamic linearity correction.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
A 7.2 GSa/s, 14 Bit or 12 GSa/s, 12 Bit Signal Generator on a Chip in a 165 GHz f<sub>T</sub> BiCMOS Process.
IEEE J. Solid State Circuits, 2012