Feroze Taraporevala

According to our database, Feroze Taraporevala authored at least 4 papers between 2006 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

A fast approach for static timing analysis covering all PVT corners.

Sari Onaissi, Feroze Taraporevala, Jinfeng Liu, Farid N. Najm

Proceedings of the 48th Design Automation Conference, 2011

2008

A Methodology for Characterization of Large Macro Cells and IP Blocks Considering Process Variations.

Amit Goel, Sarma B. K. Vrudhula, Feroze Taraporevala, Praveen Ghanta

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

Exploiting Setup-Hold-Time Interdependence in Static Timing Analysis.

Emre Salman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar, Eby G. Friedman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times.

Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006